HID: amd_sfh: Extend MP2 register access to SFH
Various MP2 register sets are supported by newer processors. Therefore, extend MP2 register access to SFH. Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Signed-off-by: Jiri Kosina <jkosina@suse.com>
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@ -19,6 +19,9 @@
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#define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
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#define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
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#define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4))
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#define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4))
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#define SENSOR_ENABLED 4
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#define SENSOR_DISABLED 5
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@ -55,6 +58,7 @@ struct amd_mp2_dev {
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struct sfh_dev_status dev_en;
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struct work_struct work;
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u8 init_done;
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u8 rver;
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};
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struct amd_mp2_ops {
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@ -81,4 +85,14 @@ void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);
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int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);
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void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);
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int amd_sfh_irq_init(struct amd_mp2_dev *privdata);
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static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx)
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{
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return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) : AMD_C2P_MSG(idx);
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}
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static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx)
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{
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return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) : AMD_P2C_MSG(idx);
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}
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#endif
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@ -99,9 +99,9 @@ static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata)
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void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata)
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{
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if (readl(privdata->mmio + AMD_P2C_MSG(4))) {
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writel(0, privdata->mmio + AMD_P2C_MSG(4));
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writel(0xf, privdata->mmio + AMD_P2C_MSG(5));
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if (readl(privdata->mmio + amd_get_p2c_val(privdata, 4))) {
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writel(0, privdata->mmio + amd_get_p2c_val(privdata, 4));
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writel(0xf, privdata->mmio + amd_get_p2c_val(privdata, 5));
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}
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}
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@ -410,6 +410,9 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
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privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data;
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if (privdata->sfh1_1_ops) {
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if (boot_cpu_data.x86 >= 0x1A)
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privdata->rver = 1;
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rc = devm_work_autocancel(&pdev->dev, &privdata->work, sfh1_1_init_work);
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if (rc)
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return rc;
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@ -251,7 +251,7 @@ static u8 get_input_rep(u8 current_index, int sensor_idx, int report_id,
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break;
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case HPD_IDX:
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get_common_inputs(&hpd_input.common_property, report_id);
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hpdstatus.val = readl(mp2->mmio + AMD_C2P_MSG(4));
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hpdstatus.val = readl(mp2->mmio + amd_get_c2p_val(mp2, 4));
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hpd_input.human_presence = hpdstatus.shpd.presence;
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report_size = sizeof(hpd_input);
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memcpy(input_report, &hpd_input, sizeof(hpd_input));
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@ -172,7 +172,7 @@ static int amd_sfh1_1_hid_client_init(struct amd_mp2_dev *privdata)
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if (rc)
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goto cleanup;
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writel(0, privdata->mmio + AMD_P2C_MSG(0));
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writel(0, privdata->mmio + amd_get_p2c_val(privdata, 0));
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mp2_ops->start(privdata, info);
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status = amd_sfh_wait_for_response
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(privdata, cl_data->sensor_idx[i], ENABLE_SENSOR);
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@ -298,7 +298,7 @@ static void amd_sfh_set_ops(struct amd_mp2_dev *mp2)
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int amd_sfh1_1_init(struct amd_mp2_dev *mp2)
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{
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u32 phy_base = readl(mp2->mmio + AMD_C2P_MSG(22));
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u32 phy_base = readl(mp2->mmio + amd_get_c2p_val(mp2, 22));
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struct device *dev = &mp2->pdev->dev;
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struct sfh_base_info binfo;
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int rc;
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@ -20,7 +20,7 @@ static int amd_sfh_wait_response(struct amd_mp2_dev *mp2, u8 sid, u32 cmd_id)
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struct sfh_cmd_response cmd_resp;
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/* Get response with status within a max of 10000 ms timeout */
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if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
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if (!readl_poll_timeout(mp2->mmio + amd_get_p2c_val(mp2, 0), cmd_resp.resp,
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(cmd_resp.response.response == 0 &&
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cmd_resp.response.cmd_id == cmd_id && (sid == 0xff ||
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cmd_resp.response.sensor_id == sid)), 500, 10000000))
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@ -39,7 +39,7 @@ static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor
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cmd_base.cmd.sub_cmd_value = 1;
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cmd_base.cmd.sensor_id = info.sensor_idx;
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writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0));
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writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0));
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}
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static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
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@ -52,8 +52,8 @@ static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
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cmd_base.cmd.sub_cmd_value = 1;
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cmd_base.cmd.sensor_id = sensor_idx;
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writeq(0x0, privdata->mmio + AMD_C2P_MSG(1));
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writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0));
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writeq(0x0, privdata->mmio + amd_get_c2p_val(privdata, 1));
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writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0));
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}
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static void amd_stop_all_sensor(struct amd_mp2_dev *privdata)
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@ -66,7 +66,7 @@ static void amd_stop_all_sensor(struct amd_mp2_dev *privdata)
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/* 0xf indicates all sensors */
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cmd_base.cmd.sensor_id = 0xf;
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writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG(0));
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writel(cmd_base.ul, privdata->mmio + amd_get_c2p_val(privdata, 0));
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}
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static struct amd_mp2_ops amd_sfh_ops = {
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