Added descriptions in the DTS for the Qualcomm SM8650 and SM8550

Camera Control Interface (CCI).
 
 Added support for the "settle-time-us" property, which allows the
 gpio-mux device to switch from one bus to another with a
 configurable delay. The time can be set in the DTS.
 
 The latest change also includes file sorting.
 
 Fixed slot numbering in the SMBus framework to prevent failures
 when more than 8 slots are occupied. It now enforces a a maximum
 of 8 slots to be used. This ensures that the Intel PIIX4 device
 can register the SPDs correctly without failure, even if other
 slots are populated but not used.
 -----BEGIN PGP SIGNATURE-----
 
 iIwEABYIADQWIQScDfrjQa34uOld1VLaeAVmJtMtbgUCZpufxhYcYW5kaS5zaHl0
 aUBrZXJuZWwub3JnAAoJENp4BWYm0y1u0IMA/iImofcZuFkHrAQW+AzRMhOq/SpI
 f9fqG1s8lzcQMaIDAQDKT9Dsl5kSBzbbGMlKo8wK4UeetZKfdqkuyC7Bn55SDQ==
 =MmFA
 -----END PGP SIGNATURE-----

Merge tag 'i2c-host-6.11-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow

Added descriptions in the DTS for the Qualcomm SM8650 and SM8550
Camera Control Interface (CCI).

Added support for the "settle-time-us" property, which allows the
gpio-mux device to switch from one bus to another with a
configurable delay. The time can be set in the DTS.

The latest change also includes file sorting.

Fixed slot numbering in the SMBus framework to prevent failures
when more than 8 slots are occupied. It now enforces a a maximum
of 8 slots to be used. This ensures that the Intel PIIX4 device
can register the SPDs correctly without failure, even if other
slots are populated but not used.
This commit is contained in:
Wolfram Sang 2024-07-20 15:42:18 +02:00
commit 6318f219cd
7 changed files with 49 additions and 15 deletions

View File

@ -57,6 +57,9 @@ properties:
last value used.
$ref: /schemas/types.yaml#/definitions/uint32
settle-time-us:
description: Delay to wait before doing any transfer when a new bus gets selected.
allOf:
- $ref: i2c-mux.yaml

View File

@ -31,6 +31,8 @@ properties:
- qcom,sm6350-cci
- qcom,sm8250-cci
- qcom,sm8450-cci
- qcom,sm8550-cci
- qcom,sm8650-cci
- const: qcom,msm8996-cci # CCI v2
"#address-cells":
@ -195,6 +197,24 @@ allOf:
- const: cpas_ahb
- const: cci
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-cci
- qcom,sm8650-cci
then:
properties:
clocks:
minItems: 3
maxItems: 3
clock-names:
items:
- const: camnoc_axi
- const: cpas_ahb
- const: cci
additionalProperties: false
examples:

View File

@ -196,6 +196,7 @@ config I2C_ISMT
config I2C_PIIX4
tristate "Intel PIIX4 and compatible (ATI/AMD/Serverworks/Broadcom/SMSC)"
depends on PCI && HAS_IOPORT
select I2C_SMBUS
help
If you say yes to this option, support will be included for the Intel
PIIX4 family of mainboard I2C interfaces. Specifically, the following

View File

@ -29,6 +29,7 @@
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/i2c.h>
#include <linux/i2c-smbus.h>
#include <linux/slab.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
@ -982,6 +983,14 @@ static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
return retval;
}
/*
* The AUX bus can not be probed as on some platforms it reports all
* devices present and all reads return "0".
* This would allow the ee1004 to be probed incorrectly.
*/
if (port == 0)
i2c_register_spd(adap);
*padap = adap;
return 0;
}

View File

@ -352,18 +352,11 @@ void i2c_register_spd(struct i2c_adapter *adap)
return;
/*
* If we're a child adapter on a muxed segment, then limit slots to 8,
* as this is the max number of SPD EEPROMs that can be addressed per bus.
* The max number of SPD EEPROMs that can be addressed per bus is 8.
* If more slots are present either muxed or multiple busses are
* necessary or the additional slots are ignored.
*/
if (i2c_parent_is_i2c_adapter(adap)) {
slot_count = 8;
} else {
if (slot_count > 8) {
dev_warn(&adap->dev,
"More than 8 memory slots on a single bus, contact i801 maintainer to add missing mux config\n");
return;
}
}
slot_count = min(slot_count, 8);
/*
* Memory types could be found at section 7.18.2 (Memory Device Type), table 78

View File

@ -5,16 +5,17 @@
* Peter Korsgaard <peter.korsgaard@barco.com>
*/
#include <linux/bits.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/gpio/driver.h>
#include <linux/i2c.h>
#include <linux/i2c-mux.h>
#include <linux/module.h>
#include <linux/overflow.h>
#include <linux/platform_data/i2c-mux-gpio.h>
#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/bits.h>
#include <linux/gpio/consumer.h>
#include <linux/gpio/driver.h>
struct gpiomux {
struct i2c_mux_gpio_platform_data data;
@ -37,6 +38,9 @@ static int i2c_mux_gpio_select(struct i2c_mux_core *muxc, u32 chan)
i2c_mux_gpio_set(mux, chan);
if (mux->data.settle_time)
fsleep(mux->data.settle_time);
return 0;
}
@ -116,6 +120,8 @@ static int i2c_mux_gpio_probe_fw(struct gpiomux *mux,
if (device_property_read_u32(dev, "idle-state", &mux->data.idle))
mux->data.idle = I2C_MUX_GPIO_NO_IDLE;
device_property_read_u32(dev, "settle-time-us", &mux->data.settle_time);
return 0;
}

View File

@ -19,6 +19,7 @@
* position
* @n_values: Number of multiplexer positions (busses to instantiate)
* @idle: Bitmask to write to MUX when idle or GPIO_I2CMUX_NO_IDLE if not used
* @settle_time: Delay to wait when a new bus is selected
*/
struct i2c_mux_gpio_platform_data {
int parent;
@ -26,6 +27,7 @@ struct i2c_mux_gpio_platform_data {
const unsigned *values;
int n_values;
unsigned idle;
u32 settle_time;
};
#endif /* _LINUX_I2C_MUX_GPIO_H */