net: dsa: mv88e6xxx: mv88e6390X SERDES support
The mv88e6390X family has 8 SERDES lanes. These can be used for 2 10Gbps ports, ports 9 or 10. If these ports are used at slower speeds, the SERDES lanes become available for other ports for 1000Base-X. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Andrew Lunn
David S. Miller
parent
ba9b989dc7
commit
6335e9f244
@ -2757,6 +2757,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
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.reset = mv88e6352_g1_reset,
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.vtu_getnext = mv88e6390_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
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.serdes_power = mv88e6390_serdes_power,
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};
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static const struct mv88e6xxx_ops mv88e6190x_ops = {
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@ -2789,6 +2790,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
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.reset = mv88e6352_g1_reset,
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.vtu_getnext = mv88e6390_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
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.serdes_power = mv88e6390_serdes_power,
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};
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static const struct mv88e6xxx_ops mv88e6191_ops = {
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@ -2821,6 +2823,7 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
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.reset = mv88e6352_g1_reset,
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.vtu_getnext = mv88e6390_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
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.serdes_power = mv88e6390_serdes_power,
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};
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static const struct mv88e6xxx_ops mv88e6240_ops = {
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@ -2888,6 +2891,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
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.reset = mv88e6352_g1_reset,
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.vtu_getnext = mv88e6390_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
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.serdes_power = mv88e6390_serdes_power,
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};
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static const struct mv88e6xxx_ops mv88e6320_ops = {
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@ -3113,6 +3117,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
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.reset = mv88e6352_g1_reset,
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.vtu_getnext = mv88e6390_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
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.serdes_power = mv88e6390_serdes_power,
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};
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static const struct mv88e6xxx_ops mv88e6390x_ops = {
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@ -3147,6 +3152,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
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.reset = mv88e6352_g1_reset,
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.vtu_getnext = mv88e6390_g1_vtu_getnext,
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.vtu_loadpurge = mv88e6390_g1_vtu_loadpurge,
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.serdes_power = mv88e6390_serdes_power,
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};
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static const struct mv88e6xxx_info mv88e6xxx_table[] = {
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@ -13,6 +13,7 @@
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#include <linux/mii.h>
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#include "global2.h"
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#include "mv88e6xxx.h"
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#include "phy.h"
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#include "port.h"
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@ -73,3 +74,156 @@ int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
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return 0;
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}
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/* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */
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static int mv88e6390_serdes_10g(struct mv88e6xxx_chip *chip, int addr, bool on)
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{
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u16 val, new_val;
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int reg_c45;
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int err;
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reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
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MV88E6390_PCS_CONTROL_1;
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err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val);
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if (err)
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return err;
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if (on)
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new_val = val & ~(MV88E6390_PCS_CONTROL_1_RESET |
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MV88E6390_PCS_CONTROL_1_LOOPBACK |
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MV88E6390_PCS_CONTROL_1_PDOWN);
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else
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new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
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if (val != new_val)
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err = mv88e6xxx_phy_write(chip, addr, reg_c45, new_val);
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return err;
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}
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/* Set the power on/off for 10GBASE-R and 10GBASE-X4/X2 */
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static int mv88e6390_serdes_sgmii(struct mv88e6xxx_chip *chip, int addr,
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bool on)
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{
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u16 val, new_val;
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int reg_c45;
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int err;
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reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE |
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MV88E6390_SGMII_CONTROL;
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err = mv88e6xxx_phy_read(chip, addr, reg_c45, &val);
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if (err)
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return err;
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if (on)
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new_val = val & ~(MV88E6390_SGMII_CONTROL_RESET |
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MV88E6390_SGMII_CONTROL_LOOPBACK |
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MV88E6390_SGMII_CONTROL_PDOWN);
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else
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new_val = val | MV88E6390_SGMII_CONTROL_PDOWN;
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if (val != new_val)
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err = mv88e6xxx_phy_write(chip, addr, reg_c45, new_val);
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return err;
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}
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static int mv88e6390_serdes_lower(struct mv88e6xxx_chip *chip, u8 cmode,
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int port_donor, int lane, bool rxaui, bool on)
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{
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int err;
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u8 cmode_donor;
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err = mv88e6xxx_port_get_cmode(chip, port_donor, &cmode_donor);
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if (err)
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return err;
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switch (cmode_donor) {
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case PORT_STATUS_CMODE_RXAUI:
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if (!rxaui)
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break;
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/* Fall through */
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case PORT_STATUS_CMODE_1000BASE_X:
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case PORT_STATUS_CMODE_SGMII:
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case PORT_STATUS_CMODE_2500BASEX:
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if (cmode == PORT_STATUS_CMODE_1000BASE_X ||
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cmode == PORT_STATUS_CMODE_SGMII)
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return mv88e6390_serdes_sgmii(chip, lane, on);
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}
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return 0;
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}
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static int mv88e6390_serdes_port9(struct mv88e6xxx_chip *chip, u8 cmode,
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bool on)
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{
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switch (cmode) {
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case PORT_STATUS_CMODE_1000BASE_X:
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case PORT_STATUS_CMODE_SGMII:
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return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT9_LANE0, on);
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case PORT_STATUS_CMODE_XAUI:
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case PORT_STATUS_CMODE_RXAUI:
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case PORT_STATUS_CMODE_2500BASEX:
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return mv88e6390_serdes_10g(chip, MV88E6390_PORT9_LANE0, on);
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}
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return 0;
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}
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static int mv88e6390_serdes_port10(struct mv88e6xxx_chip *chip, u8 cmode,
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bool on)
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{
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switch (cmode) {
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case PORT_STATUS_CMODE_SGMII:
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return mv88e6390_serdes_sgmii(chip, MV88E6390_PORT10_LANE0, on);
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case PORT_STATUS_CMODE_XAUI:
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case PORT_STATUS_CMODE_RXAUI:
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case PORT_STATUS_CMODE_1000BASE_X:
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case PORT_STATUS_CMODE_2500BASEX:
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return mv88e6390_serdes_10g(chip, MV88E6390_PORT10_LANE0, on);
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}
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return 0;
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}
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int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on)
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{
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u8 cmode;
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int err;
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err = mv88e6xxx_port_get_cmode(chip, port, &cmode);
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if (err)
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return cmode;
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switch (port) {
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case 2:
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return mv88e6390_serdes_lower(chip, cmode, 9,
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MV88E6390_PORT9_LANE1,
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false, on);
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case 3:
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return mv88e6390_serdes_lower(chip, cmode, 9,
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MV88E6390_PORT9_LANE2,
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true, on);
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case 4:
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return mv88e6390_serdes_lower(chip, cmode, 9,
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MV88E6390_PORT9_LANE3,
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true, on);
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case 5:
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return mv88e6390_serdes_lower(chip, cmode, 10,
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MV88E6390_PORT10_LANE1,
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false, on);
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case 6:
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return mv88e6390_serdes_lower(chip, cmode, 10,
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MV88E6390_PORT10_LANE2,
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true, on);
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case 7:
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return mv88e6390_serdes_lower(chip, cmode, 10,
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MV88E6390_PORT10_LANE3,
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true, on);
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case 9:
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return mv88e6390_serdes_port9(chip, cmode, on);
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case 10:
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return mv88e6390_serdes_port10(chip, cmode, on);
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}
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return 0;
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}
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@ -19,6 +19,30 @@
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#define MV88E6352_ADDR_SERDES 0x0f
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#define MV88E6352_SERDES_PAGE_FIBER 0x01
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#define MV88E6390_PORT9_LANE0 0x09
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#define MV88E6390_PORT9_LANE1 0x12
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#define MV88E6390_PORT9_LANE2 0x13
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#define MV88E6390_PORT9_LANE3 0x14
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#define MV88E6390_PORT10_LANE0 0x0a
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#define MV88E6390_PORT10_LANE1 0x15
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#define MV88E6390_PORT10_LANE2 0x16
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#define MV88E6390_PORT10_LANE3 0x17
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#define MV88E6390_SERDES_DEVICE (4 << 16)
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/* 10GBASE-R and 10GBASE-X4/X2 */
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#define MV88E6390_PCS_CONTROL_1 0x1000
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#define MV88E6390_PCS_CONTROL_1_RESET BIT(15)
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#define MV88E6390_PCS_CONTROL_1_LOOPBACK BIT(14)
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#define MV88E6390_PCS_CONTROL_1_SPEED BIT(13)
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#define MV88E6390_PCS_CONTROL_1_PDOWN BIT(11)
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/* 1000BASE-X and SGMII */
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#define MV88E6390_SGMII_CONTROL 0x2000
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#define MV88E6390_SGMII_CONTROL_RESET BIT(15)
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#define MV88E6390_SGMII_CONTROL_LOOPBACK BIT(14)
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#define MV88E6390_SGMII_CONTROL_PDOWN BIT(11)
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int mv88e6352_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
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int mv88e6390_serdes_power(struct mv88e6xxx_chip *chip, int port, bool on);
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#endif
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