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Second Round of Renesas ARM Based SoC Fixes for v4.6

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* Don't disable referenced optional scif clock
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Merge tag 'renesas-fixes2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes

Merge "Second Round of Renesas ARM Based SoC Fixes for v4.6" from Simon Horman:

* Don't disable referenced optional scif clock

* tag 'renesas-fixes2-for-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7795: Don't disable referenced optional scif clock
  ARM: shmobile: timer: Fix preset_lpj leading to too short delays
  Revert "ARM: dts: porter: Enable SCIF_CLK frequency and pins"
  ARM: dts: r8a7791: Don't disable referenced optional clocks
This commit is contained in:
Arnd Bergmann 2016-04-28 17:46:27 +02:00
commit 6383190203
5 changed files with 14 additions and 35 deletions
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1
arch/arm/boot/dts/r8a7791-koelsch.dts
View File

@ -661,6 +661,7 @@
}; };
&pcie_bus_clk { &pcie_bus_clk {
clock-frequency = <100000000>;
status = "okay"; status = "okay";
}; };

14
arch/arm/boot/dts/r8a7791-porter.dts
View File

@ -143,19 +143,11 @@
}; };
&pfc { &pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
scif0_pins: serial0 { scif0_pins: serial0 {
renesas,groups = "scif0_data_d"; renesas,groups = "scif0_data_d";
renesas,function = "scif0"; renesas,function = "scif0";
}; };
scif_clk_pins: scif_clk {
renesas,groups = "scif_clk";
renesas,function = "scif_clk";
};
ether_pins: ether { ether_pins: ether {
renesas,groups = "eth_link", "eth_mdio", "eth_rmii"; renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
renesas,function = "eth"; renesas,function = "eth";
@ -229,11 +221,6 @@
status = "okay"; status = "okay";
}; };
&scif_clk {
clock-frequency = <14745600>;
status = "okay";
};
&ether { &ether {
pinctrl-0 = <&ether_pins &phy1_pins>; pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
@ -414,6 +401,7 @@
}; };
&pcie_bus_clk { &pcie_bus_clk {
clock-frequency = <100000000>;
status = "okay"; status = "okay";
}; };

5
arch/arm/boot/dts/r8a7791.dtsi
View File

@ -1083,9 +1083,8 @@
pcie_bus_clk: pcie_bus_clk { pcie_bus_clk: pcie_bus_clk {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <100000000>; clock-frequency = <0>;
clock-output-names = "pcie_bus"; clock-output-names = "pcie_bus";
status = "disabled";
}; };
/* External SCIF clock */ /* External SCIF clock */
@ -1094,7 +1093,6 @@
#clock-cells = <0>; #clock-cells = <0>;
/* This value must be overridden by the board. */ /* This value must be overridden by the board. */
clock-frequency = <0>; clock-frequency = <0>;
status = "disabled";
}; };
/* External USB clock - can be overridden by the board */ /* External USB clock - can be overridden by the board */
@ -1112,7 +1110,6 @@
/* This value must be overridden by the board. */ /* This value must be overridden by the board. */
clock-frequency = <0>; clock-frequency = <0>;
clock-output-names = "can_clk"; clock-output-names = "can_clk";
status = "disabled";
}; };
/* Special CPG clocks */ /* Special CPG clocks */

28
arch/arm/mach-shmobile/timer.c
View File

@ -40,8 +40,7 @@ static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
void __init shmobile_init_delay(void) void __init shmobile_init_delay(void)
{ {
struct device_node *np, *cpus; struct device_node *np, *cpus;
bool is_a7_a8_a9 = false; unsigned int div = 0;
bool is_a15 = false;
bool has_arch_timer = false; bool has_arch_timer = false;
u32 max_freq = 0; u32 max_freq = 0;
@ -55,27 +54,22 @@ void __init shmobile_init_delay(void)
if (!of_property_read_u32(np, "clock-frequency", &freq)) if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq); max_freq = max(max_freq, freq);
if (of_device_is_compatible(np, "arm,cortex-a8") || if (of_device_is_compatible(np, "arm,cortex-a8")) {
of_device_is_compatible(np, "arm,cortex-a9")) { div = 2;
is_a7_a8_a9 = true; } else if (of_device_is_compatible(np, "arm,cortex-a9")) {
} else if (of_device_is_compatible(np, "arm,cortex-a7")) { div = 1;
is_a7_a8_a9 = true; } else if (of_device_is_compatible(np, "arm,cortex-a7") ||
has_arch_timer = true; of_device_is_compatible(np, "arm,cortex-a15")) {
} else if (of_device_is_compatible(np, "arm,cortex-a15")) { div = 1;
is_a15 = true;
has_arch_timer = true; has_arch_timer = true;
} }
} }
of_node_put(cpus); of_node_put(cpus);
if (!max_freq) if (!max_freq || !div)
return; return;
if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) { if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
if (is_a7_a8_a9) shmobile_setup_delay_hz(max_freq, 1, div);
shmobile_setup_delay_hz(max_freq, 1, 3);
else if (is_a15)
shmobile_setup_delay_hz(max_freq, 2, 4);
}
} }

1
arch/arm64/boot/dts/renesas/r8a7795.dtsi
View File

@ -120,7 +120,6 @@
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <0>; clock-frequency = <0>;
status = "disabled";
}; };
soc { soc {