MIPS: Ingenic: Add Ingenic X1830 support.
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740. This is left unselectable in Kconfig until a X1830 based board is added in a later commit. Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
周琰杰 (Zhou Yanjie)
Thomas Bogendoerfer
parent
c7c101df0a
commit
63970c291d
300
arch/mips/boot/dts/ingenic/x1830.dtsi
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300
arch/mips/boot/dts/ingenic/x1830.dtsi
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@ -0,0 +1,300 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <dt-bindings/clock/ingenic,tcu.h>
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#include <dt-bindings/clock/x1830-cgu.h>
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#include <dt-bindings/dma/x1830-dma.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ingenic,x1830";
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cpuintc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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intc: interrupt-controller@10001000 {
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compatible = "ingenic,x1830-intc", "ingenic,jz4780-intc";
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reg = <0x10001000 0x50>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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exclk: ext {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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rtclk: rtc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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cgu: x1830-cgu@10000000 {
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compatible = "ingenic,x1830-cgu";
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reg = <0x10000000 0x100>;
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#clock-cells = <1>;
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clocks = <&exclk>, <&rtclk>;
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clock-names = "ext", "rtc";
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};
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tcu: timer@10002000 {
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compatible = "ingenic,x1830-tcu", "ingenic,x1000-tcu", "simple-mfd";
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reg = <0x10002000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x10002000 0x1000>;
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#clock-cells = <1>;
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clocks = <&cgu X1830_CLK_RTCLK
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&cgu X1830_CLK_EXCLK
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&cgu X1830_CLK_PCLK>;
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clock-names = "rtc", "ext", "pclk";
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&intc>;
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interrupts = <27 26 25>;
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wdt: watchdog@0 {
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compatible = "ingenic,x1830-watchdog", "ingenic,jz4780-watchdog";
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reg = <0x0 0x10>;
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clocks = <&tcu TCU_CLK_WDT>;
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clock-names = "wdt";
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};
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};
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rtc: rtc@10003000 {
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compatible = "ingenic,x1830-rtc", "ingenic,jz4780-rtc";
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reg = <0x10003000 0x4c>;
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interrupt-parent = <&intc>;
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interrupts = <32>;
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clocks = <&cgu X1830_CLK_RTCLK>;
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clock-names = "rtc";
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};
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pinctrl: pin-controller@10010000 {
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compatible = "ingenic,x1830-pinctrl";
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reg = <0x10010000 0x800>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpa: gpio@0 {
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compatible = "ingenic,x1830-gpio";
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reg = <0>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <17>;
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};
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gpb: gpio@1 {
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compatible = "ingenic,x1830-gpio";
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reg = <1>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 32 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <16>;
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};
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gpc: gpio@2 {
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compatible = "ingenic,x1830-gpio";
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reg = <2>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 64 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <15>;
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};
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gpd: gpio@3 {
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compatible = "ingenic,x1830-gpio";
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reg = <3>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 96 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <14>;
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};
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};
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uart0: serial@10030000 {
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compatible = "ingenic,x1830-uart", "ingenic,x1000-uart";
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reg = <0x10030000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <51>;
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clocks = <&exclk>, <&cgu X1830_CLK_UART0>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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uart1: serial@10031000 {
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compatible = "ingenic,x1830-uart", "ingenic,x1000-uart";
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reg = <0x10031000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <50>;
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clocks = <&exclk>, <&cgu X1830_CLK_UART1>;
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clock-names = "baud", "module";
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status = "disabled";
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};
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i2c0: i2c-controller@10050000 {
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compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
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reg = <0x10050000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&intc>;
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interrupts = <60>;
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clocks = <&cgu X1830_CLK_SMB0>;
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status = "disabled";
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};
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i2c1: i2c-controller@10051000 {
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compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
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reg = <0x10051000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&intc>;
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interrupts = <59>;
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clocks = <&cgu X1830_CLK_SMB1>;
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status = "disabled";
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};
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i2c2: i2c-controller@10052000 {
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compatible = "ingenic,x1830-i2c", "ingenic,x1000-i2c";
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reg = <0x10052000 0x1000>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&intc>;
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interrupts = <58>;
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clocks = <&cgu X1830_CLK_SMB2>;
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status = "disabled";
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};
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pdma: dma-controller@13420000 {
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compatible = "ingenic,x1830-dma";
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reg = <0x13420000 0x400
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0x13421000 0x40>;
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#dma-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <10>;
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clocks = <&cgu X1830_CLK_PDMA>;
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};
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msc0: mmc@13450000 {
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compatible = "ingenic,x1830-mmc", "ingenic,x1000-mmc";
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reg = <0x13450000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <37>;
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clocks = <&cgu X1830_CLK_MSC0>;
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clock-names = "mmc";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
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<&pdma X1830_DMA_MSC0_TX 0xffffffff>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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msc1: mmc@13460000 {
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compatible = "ingenic,x1830-mmc", "ingenic,x1000-mmc";
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reg = <0x13460000 0x1000>;
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interrupt-parent = <&intc>;
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interrupts = <36>;
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clocks = <&cgu X1830_CLK_MSC1>;
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clock-names = "mmc";
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cap-sd-highspeed;
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cap-mmc-highspeed;
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cap-sdio-irq;
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dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
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<&pdma X1830_DMA_MSC1_TX 0xffffffff>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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mac: ethernet@134b0000 {
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compatible = "ingenic,x1830-mac", "snps,dwmac";
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reg = <0x134b0000 0x2000>;
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interrupt-parent = <&intc>;
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interrupts = <55>;
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interrupt-names = "macirq";
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clocks = <&cgu X1830_CLK_MAC>;
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clock-names = "stmmaceth";
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status = "disabled";
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mdio: mdio {
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compatible = "snps,dwmac-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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};
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@ -58,3 +58,9 @@ config MACH_X1000
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select MIPS_CPU_SCACHE
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_SUPPORTS_HIGHMEM
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config MACH_X1830
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bool
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select MIPS_CPU_SCACHE
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_SUPPORTS_HIGHMEM
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