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irqchip fixes for 5.18, take #1

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- Fix GICv3 polling for RWP in redistributors
 
 - Reject ACPI attempts to use SGIs on GIC/GICv3
 
 - Fix unpredictible behaviour when making a VPE non-resident
   with GICv4
 
 - A couple of fixes for the newly merged qcom-mpm driver
 -----BEGIN PGP SIGNATURE-----
 
 iQJDBAABCgAtFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAmJRUIQPHG1hekBrZXJu
 ZWwub3JnAAoJECPQ0LrRPXpDJsYP/A1wjOMvcK2HHRDdKXgc65sFrv0uI4kZw1yX
 UxxRp/nwYo7uuz3L/k7D4/C96nMERP2rjiF2Y4NURLEhgVlh3iNK/lQWb9eVsN04
 jX33c3qOeH5kNAy89uYv1PnNy/QjjIm3LFh0lSXCLEDK0CV3l+LKcuGDHVn8pP0B
 2rd/N+s0Hc/SL2W/cV+pGkoJK9RGfWojC6SalFjFD/n8jE2jBNcMGeeZERdNhuVP
 r/ZwMEtM248KFyCX04QKidDexk37HZmrgq1K+RlPX60zqu/hcsDO27zF/qhru+U+
 Kr8WPLHsrzCo//9b5o8s/WTZE9QXA7QmTGum2KHfQazDug7YSk5Fgh1t7f1dSVAw
 Yh7cNtWXqa63I4woBlUtR8AImnIbM/a66Qeim+RZRl8QI5IMndgcLQaNu/IeoqVs
 wUNVX32mnQ0ee3Von/ADSBL+4ibqxQiw11ZXZU8/1Dc+teaMBshVdcHrug+iU7e8
 ftjwyf9IUsiITTNrExm6CDkzL27hbwHoHAD3eDkNisqTyJYmyWvL36kab88NgCAg
 Moc9WH2XkM4fZv0/9OADdyPJUOLtuZw85/45O2ydGVvpvW3GVmo06xt6P70P3/rq
 x2aU6n7CpYRrFZn7IL1hY8HBUXS+s/Ya65B7/L63yngyq8xAslkYOwcTx/XjHpEP
 EQt3/t9f
 =W3KX
 -----END PGP SIGNATURE-----

Merge tag 'irqchip-fixes-5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent

Pull irqchip fixes from Marc Zyngier:

 - Fix GICv3 polling for RWP in redistributors

 - Reject ACPI attempts to use SGIs on GIC/GICv3

 - Fix unpredictible behaviour when making a VPE non-resident
   with GICv4

 - A couple of fixes for the newly merged qcom-mpm driver

Link: https://lore.kernel.org/lkml/20220409094229.267649-1-maz@kernel.org
This commit is contained in:
Thomas Gleixner 2022-04-09 22:21:55 +02:00
commit 63ef1a8a07
5 changed files with 37 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/irqchip/Kconfig
View File

@ -433,6 +433,7 @@ config QCOM_PDC
config QCOM_MPM
tristate "QCOM MPM"
depends on ARCH_QCOM
depends on MAILBOX
select IRQ_DOMAIN_HIERARCHY
help
MSM Power Manager driver to manage and configure wakeup

28
drivers/irqchip/irq-gic-v3-its.c
View File

@ -3011,18 +3011,12 @@ static int __init allocate_lpi_tables(void)
return 0;
}
static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set)
static u64 read_vpend_dirty_clear(void __iomem *vlpi_base)
{
u32 count = 1000000; /* 1s! */
bool clean;
u64 val;
val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER);
val &= ~GICR_VPENDBASER_Valid;
val &= ~clr;
val |= set;
gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
do {
val = gicr_read_vpendbaser(vlpi_base + GICR_VPENDBASER);
clean = !(val & GICR_VPENDBASER_Dirty);
@ -3033,10 +3027,26 @@ static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set)
}
} while (!clean && count);
if (unlikely(val & GICR_VPENDBASER_Dirty)) {
if (unlikely(!clean))
pr_err_ratelimited("ITS virtual pending table not cleaning\n");
return val;
}
static u64 its_clear_vpend_valid(void __iomem *vlpi_base, u64 clr, u64 set)
{
u64 val;
/* Make sure we wait until the RD is done with the initial scan */
val = read_vpend_dirty_clear(vlpi_base);
val &= ~GICR_VPENDBASER_Valid;
val &= ~clr;
val |= set;
gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
val = read_vpend_dirty_clear(vlpi_base);
if (unlikely(val & GICR_VPENDBASER_Dirty))
val |= GICR_VPENDBASER_PendingLast;
}
return val;
}

14
drivers/irqchip/irq-gic-v3.c
View File

@ -206,11 +206,11 @@ static inline void __iomem *gic_dist_base(struct irq_data *d)
}
}
static void gic_do_wait_for_rwp(void __iomem *base)
static void gic_do_wait_for_rwp(void __iomem *base, u32 bit)
{
u32 count = 1000000; /* 1s! */
while (readl_relaxed(base + GICD_CTLR) & GICD_CTLR_RWP) {
while (readl_relaxed(base + GICD_CTLR) & bit) {
count--;
if (!count) {
pr_err_ratelimited("RWP timeout, gone fishing\n");
@ -224,13 +224,13 @@ static void gic_do_wait_for_rwp(void __iomem *base)
/* Wait for completion of a distributor change */
static void gic_dist_wait_for_rwp(void)
{
gic_do_wait_for_rwp(gic_data.dist_base);
gic_do_wait_for_rwp(gic_data.dist_base, GICD_CTLR_RWP);
}
/* Wait for completion of a redistributor change */
static void gic_redist_wait_for_rwp(void)
{
gic_do_wait_for_rwp(gic_data_rdist_rd_base());
gic_do_wait_for_rwp(gic_data_rdist_rd_base(), GICR_CTLR_RWP);
}
#ifdef CONFIG_ARM64
@ -1466,6 +1466,12 @@ static int gic_irq_domain_translate(struct irq_domain *d,
if(fwspec->param_count != 2)
return -EINVAL;
if (fwspec->param[0] < 16) {
pr_err(FW_BUG "Illegal GSI%d translation request\n",
fwspec->param[0]);
return -EINVAL;
}
*hwirq = fwspec->param[0];
*type = fwspec->param[1];

6
drivers/irqchip/irq-gic.c
View File

@ -1123,6 +1123,12 @@ static int gic_irq_domain_translate(struct irq_domain *d,
if(fwspec->param_count != 2)
return -EINVAL;
if (fwspec->param[0] < 16) {
pr_err(FW_BUG "Illegal GSI%d translation request\n",
fwspec->param[0]);
return -EINVAL;
}
*hwirq = fwspec->param[0];
*type = fwspec->param[1];

2
drivers/irqchip/irq-qcom-mpm.c
View File

@ -375,7 +375,7 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent)
raw_spin_lock_init(&priv->lock);
priv->base = devm_platform_ioremap_resource(pdev, 0);
if (!priv->base)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
for (i = 0; i < priv->reg_stride; i++) {