drm/amdgpu: Add support for RAS table at 0x40000
Add support for RAS table at I2C EEPROM address of 0x40000, since on some ASICs it is not at 0, but at 0x40000. Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: Kent Russell <kent.russell@amd.com> Signed-off-by: Luben Tuikov <luben.tuikov@amd.com> Tested-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -157,6 +157,7 @@ static bool __get_eeprom_i2c_addr_ip_discovery(struct amdgpu_device *adev,
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static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev,
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struct amdgpu_ras_eeprom_control *control)
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{
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struct atom_context *atom_ctx = adev->mode_info.atom_context;
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u8 i2c_addr;
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if (!control)
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@ -190,7 +191,11 @@ static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev,
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break;
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case CHIP_ALDEBARAN:
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control->i2c_address = EEPROM_I2C_MADDR_0;
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if (strnstr(atom_ctx->vbios_version, "D673",
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sizeof(atom_ctx->vbios_version)))
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control->i2c_address = EEPROM_I2C_MADDR_4;
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else
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control->i2c_address = EEPROM_I2C_MADDR_0;
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break;
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case CHIP_IP_DISCOVERY:
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