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drm/virtio: move byteorder handling into virtio_gpu_cmd_transfer_to_host_2d function

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Be consistent with the rest of the code base.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20191018122352.17019-1-kraxel@redhat.com
This commit is contained in:
Gerd Hoffmann 2019-10-18 14:23:52 +02:00
parent 9e370dfec4
commit 64f1cc99ef
3 changed files with 14 additions and 14 deletions
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4
drivers/gpu/drm/virtio/virtgpu_drv.h
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@ -267,8 +267,8 @@ void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
uint32_t resource_id); uint32_t resource_id);
void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
uint64_t offset, uint64_t offset,
__le32 width, __le32 height, uint32_t width, uint32_t height,
__le32 x, __le32 y, uint32_t x, uint32_t y,
struct virtio_gpu_object_array *objs, struct virtio_gpu_object_array *objs,
struct virtio_gpu_fence *fence); struct virtio_gpu_fence *fence);
void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,

12
drivers/gpu/drm/virtio/virtgpu_plane.c
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@ -132,10 +132,10 @@ static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]); virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]);
virtio_gpu_cmd_transfer_to_host_2d virtio_gpu_cmd_transfer_to_host_2d
(vgdev, 0, (vgdev, 0,
cpu_to_le32(plane->state->src_w >> 16), plane->state->src_w >> 16,
cpu_to_le32(plane->state->src_h >> 16), plane->state->src_h >> 16,
cpu_to_le32(plane->state->src_x >> 16), plane->state->src_x >> 16,
cpu_to_le32(plane->state->src_y >> 16), plane->state->src_y >> 16,
objs, NULL); objs, NULL);
} }
} else { } else {
@ -234,8 +234,8 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]); virtio_gpu_array_add_obj(objs, vgfb->base.obj[0]);
virtio_gpu_cmd_transfer_to_host_2d virtio_gpu_cmd_transfer_to_host_2d
(vgdev, 0, (vgdev, 0,
cpu_to_le32(plane->state->crtc_w), plane->state->crtc_w,
cpu_to_le32(plane->state->crtc_h), plane->state->crtc_h,
0, 0, objs, vgfb->fence); 0, 0, objs, vgfb->fence);
dma_fence_wait(&vgfb->fence->f, true); dma_fence_wait(&vgfb->fence->f, true);
dma_fence_put(&vgfb->fence->f); dma_fence_put(&vgfb->fence->f);

12
drivers/gpu/drm/virtio/virtgpu_vq.c
View File

@ -549,8 +549,8 @@ void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
uint64_t offset, uint64_t offset,
__le32 width, __le32 height, uint32_t width, uint32_t height,
__le32 x, __le32 y, uint32_t x, uint32_t y,
struct virtio_gpu_object_array *objs, struct virtio_gpu_object_array *objs,
struct virtio_gpu_fence *fence) struct virtio_gpu_fence *fence)
{ {
@ -571,10 +571,10 @@ void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D); cmd_p->hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D);
cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle); cmd_p->resource_id = cpu_to_le32(bo->hw_res_handle);
cmd_p->offset = cpu_to_le64(offset); cmd_p->offset = cpu_to_le64(offset);
cmd_p->r.width = width; cmd_p->r.width = cpu_to_le32(width);
cmd_p->r.height = height; cmd_p->r.height = cpu_to_le32(height);
cmd_p->r.x = x; cmd_p->r.x = cpu_to_le32(x);
cmd_p->r.y = y; cmd_p->r.y = cpu_to_le32(y);
virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence); virtio_gpu_queue_fenced_ctrl_buffer(vgdev, vbuf, &cmd_p->hdr, fence);
} }