sh: Better description of SH-4 PTEA register update.
Signed-off-by: Michael Trimarchi <trimarchimichael@yahoo.it> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -87,6 +87,14 @@
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#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
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#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
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#ifndef CONFIG_X2TLB
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/* copy the ptea attributes */
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static inline unsigned long copy_ptea_attributes(unsigned long x)
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{
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return ((x >> 28) & 0xe) | (x & 0x1);
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}
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#endif
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/* Mask which drops unused bits from the PTEL value */
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#if defined(CONFIG_CPU_SH3)
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#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
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@ -61,9 +61,12 @@ void update_mmu_cache(struct vm_area_struct * vma,
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*/
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ctrl_outl(pte.pte_high, MMU_PTEA);
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#else
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if (cpu_data->flags & CPU_HAS_PTEA)
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/* TODO: make this look less hacky */
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ctrl_outl(((pteval >> 28) & 0xe) | (pteval & 0x1), MMU_PTEA);
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if (cpu_data->flags & CPU_HAS_PTEA) {
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/* The last 3 bits and the first one of pteval contains
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* the PTEA timing control and space attribute bits
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*/
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ctrl_outl(copy_ptea_attributes(pteval), MMU_PTEA);
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}
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#endif
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/* Set PTEL register */
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