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powerpc/perf: Update perf_regs structure to include MMCRA

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On each sample, Monitor Mode Control Register A (MMCRA) content is
saved in pt_regs. MMCRA does not have a entry as-is in the pt_regs but
instead, MMCRA content is saved in the "dsisr" register of pt_regs.

Patch adds another entry to the perf_regs structure to include the
"MMCRA" printing which internally maps to the "dsisr" of pt_regs.

It also check for the MMCRA availability in the platform and present
value accordingly

mpe: This was the 2nd patch in a series with commit 333804dc3b7a
("powerpc/perf: Update perf_regs structure to include SIER") but I
accidentally only merged the 1st patch, so merge this one now.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Madhavan Srinivasan 2018-12-09 14:55:36 +05:30 committed by Michael Ellerman
parent bfeffd1552
commit 6529870cb0
5 changed files with 11 additions and 1 deletions
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1
arch/powerpc/include/uapi/asm/perf_regs.h
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@ -47,6 +47,7 @@ enum perf_event_powerpc_regs {
PERF_REG_POWERPC_DAR, PERF_REG_POWERPC_DAR,
PERF_REG_POWERPC_DSISR, PERF_REG_POWERPC_DSISR,
PERF_REG_POWERPC_SIER, PERF_REG_POWERPC_SIER,
PERF_REG_POWERPC_MMCRA,
PERF_REG_POWERPC_MAX, PERF_REG_POWERPC_MAX,
}; };
#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */ #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */

6
arch/powerpc/perf/perf_regs.c
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@ -70,6 +70,7 @@ static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = {
PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar), PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),
PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr), PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),
PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar), PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),
PT_REGS_OFFSET(PERF_REG_POWERPC_MMCRA, dsisr),
}; };
u64 perf_reg_value(struct pt_regs *regs, int idx) u64 perf_reg_value(struct pt_regs *regs, int idx)
@ -83,6 +84,11 @@ u64 perf_reg_value(struct pt_regs *regs, int idx)
!is_sier_available())) !is_sier_available()))
return 0; return 0;
if (idx == PERF_REG_POWERPC_MMCRA &&
(IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||
IS_ENABLED(CONFIG_PPC32)))
return 0;
return regs_get_register(regs, pt_regs_offset[idx]); return regs_get_register(regs, pt_regs_offset[idx]);
} }

1
tools/arch/powerpc/include/uapi/asm/perf_regs.h
View File

@ -47,6 +47,7 @@ enum perf_event_powerpc_regs {
PERF_REG_POWERPC_DAR, PERF_REG_POWERPC_DAR,
PERF_REG_POWERPC_DSISR, PERF_REG_POWERPC_DSISR,
PERF_REG_POWERPC_SIER, PERF_REG_POWERPC_SIER,
PERF_REG_POWERPC_MMCRA,
PERF_REG_POWERPC_MAX, PERF_REG_POWERPC_MAX,
}; };
#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */ #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */

3
tools/perf/arch/powerpc/include/perf_regs.h
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@ -63,7 +63,8 @@ static const char *reg_names[] = {
[PERF_REG_POWERPC_TRAP] = "trap", [PERF_REG_POWERPC_TRAP] = "trap",
[PERF_REG_POWERPC_DAR] = "dar", [PERF_REG_POWERPC_DAR] = "dar",
[PERF_REG_POWERPC_DSISR] = "dsisr", [PERF_REG_POWERPC_DSISR] = "dsisr",
[PERF_REG_POWERPC_SIER] = "sier" [PERF_REG_POWERPC_SIER] = "sier",
[PERF_REG_POWERPC_MMCRA] = "mmcra"
}; };
static inline const char *perf_reg_name(int id) static inline const char *perf_reg_name(int id)

1
tools/perf/arch/powerpc/util/perf_regs.c
View File

@ -53,6 +53,7 @@ const struct sample_reg sample_reg_masks[] = {
SMPL_REG(dar, PERF_REG_POWERPC_DAR), SMPL_REG(dar, PERF_REG_POWERPC_DAR),
SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR), SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
SMPL_REG(sier, PERF_REG_POWERPC_SIER), SMPL_REG(sier, PERF_REG_POWERPC_SIER),
SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
SMPL_REG_END SMPL_REG_END
}; };