power: reset: at91-reset: add support for sam9x60 SoC
Add support for additional reset causes and the proper compatibility string for sam9x60 SoC. The restart function is the same as the samx7. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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@ -44,6 +44,9 @@ enum reset_type {
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RESET_TYPE_WATCHDOG = 2,
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RESET_TYPE_WATCHDOG = 2,
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RESET_TYPE_SOFTWARE = 3,
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RESET_TYPE_SOFTWARE = 3,
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RESET_TYPE_USER = 4,
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RESET_TYPE_USER = 4,
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RESET_TYPE_CPU_FAIL = 6,
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RESET_TYPE_XTAL_FAIL = 7,
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RESET_TYPE_ULP2 = 8,
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};
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};
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static void __iomem *at91_ramc_base[2], *at91_rstc_base;
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static void __iomem *at91_ramc_base[2], *at91_rstc_base;
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@ -164,6 +167,15 @@ static void __init at91_reset_status(struct platform_device *pdev)
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case RESET_TYPE_USER:
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case RESET_TYPE_USER:
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reason = "user reset";
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reason = "user reset";
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break;
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break;
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case RESET_TYPE_CPU_FAIL:
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reason = "CPU clock failure detection";
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break;
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case RESET_TYPE_XTAL_FAIL:
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reason = "32.768 kHz crystal failure detection";
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break;
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case RESET_TYPE_ULP2:
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reason = "ULP2 reset";
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break;
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default:
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default:
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reason = "unknown reset";
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reason = "unknown reset";
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break;
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break;
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@ -183,6 +195,7 @@ static const struct of_device_id at91_reset_of_match[] = {
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{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
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{ .compatible = "atmel,at91sam9g45-rstc", .data = at91sam9g45_restart },
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{ .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart },
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{ .compatible = "atmel,sama5d3-rstc", .data = sama5d3_restart },
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{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
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{ .compatible = "atmel,samx7-rstc", .data = samx7_restart },
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{ .compatible = "microchip,sam9x60-rstc", .data = samx7_restart },
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{ /* sentinel */ }
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{ /* sentinel */ }
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};
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};
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MODULE_DEVICE_TABLE(of, at91_reset_of_match);
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MODULE_DEVICE_TABLE(of, at91_reset_of_match);
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