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drm/amd/pm: Support board calibration on aldebaran

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Add support for board power calibration on Aldebaran.
Board calibration is done after DC offset calibration.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2021-07-15 14:54:49 +08:00 committed by Alex Deucher
parent 93b6bd307a
commit 6588b101ed
3 changed files with 40 additions and 12 deletions
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3
drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h
View File

@ -101,7 +101,8 @@
#define PPSMC_MSG_SetSystemVirtualSTBtoDramAddrLow 0x41
#define PPSMC_MSG_GfxDriverResetRecovery 0x42
#define PPSMC_Message_Count 0x43
#define PPSMC_MSG_BoardPowerCalibration 0x43
#define PPSMC_Message_Count 0x44
//PPSMC Reset Types
#define PPSMC_RESET_TYPE_WARM_RESET 0x00

3
drivers/gpu/drm/amd/pm/inc/smu_types.h
View File

@ -225,7 +225,8 @@
__SMU_DUMMY_MAP(DisableDeterminism), \
__SMU_DUMMY_MAP(SetUclkDpmMode), \
__SMU_DUMMY_MAP(LightSBR), \
__SMU_DUMMY_MAP(GfxDriverResetRecovery),
__SMU_DUMMY_MAP(GfxDriverResetRecovery), \
__SMU_DUMMY_MAP(BoardPowerCalibration),
#undef __SMU_DUMMY_MAP
#define __SMU_DUMMY_MAP(type) SMU_MSG_##type

46
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
View File

@ -134,6 +134,7 @@ static const struct cmn2asic_msg_mapping aldebaran_message_map[SMU_MSG_MAX_COUNT
MSG_MAP(DisableDeterminism, PPSMC_MSG_DisableDeterminism, 0),
MSG_MAP(SetUclkDpmMode, PPSMC_MSG_SetUclkDpmMode, 0),
MSG_MAP(GfxDriverResetRecovery, PPSMC_MSG_GfxDriverResetRecovery, 0),
MSG_MAP(BoardPowerCalibration, PPSMC_MSG_BoardPowerCalibration, 0),
};
static const struct cmn2asic_mapping aldebaran_clk_map[SMU_CLK_COUNT] = {
@ -440,6 +441,39 @@ static int aldebaran_setup_pptable(struct smu_context *smu)
return ret;
}
static bool aldebaran_is_primary(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
if (adev->smuio.funcs && adev->smuio.funcs->get_die_id)
return adev->smuio.funcs->get_die_id(adev) == 0;
return true;
}
static int aldebaran_run_board_btc(struct smu_context *smu)
{
u32 smu_version;
int ret;
if (!aldebaran_is_primary(smu))
return 0;
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
if (ret) {
dev_err(smu->adev->dev, "Failed to get smu version!\n");
return ret;
}
if (smu_version <= 0x00441d00)
return 0;
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_BoardPowerCalibration, NULL);
if (ret)
dev_err(smu->adev->dev, "Board power calibration failed!\n");
return ret;
}
static int aldebaran_run_btc(struct smu_context *smu)
{
int ret;
@ -447,6 +481,8 @@ static int aldebaran_run_btc(struct smu_context *smu)
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_RunDcBtc, NULL);
if (ret)
dev_err(smu->adev->dev, "RunDcBtc failed!\n");
else
ret = aldebaran_run_board_btc(smu);
return ret;
}
@ -524,16 +560,6 @@ static int aldebaran_freqs_in_same_level(int32_t frequency1,
return (abs(frequency1 - frequency2) <= EPSILON);
}
static bool aldebaran_is_primary(struct smu_context *smu)
{
struct amdgpu_device *adev = smu->adev;
if (adev->smuio.funcs && adev->smuio.funcs->get_die_id)
return adev->smuio.funcs->get_die_id(adev) == 0;
return true;
}
static int aldebaran_get_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)