Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: ALSA: AACI: allow writes to MAINCR to take effect ARM: Update mach-types ARM: 6652/1: ep93xx: correct the end address of the AC97 memory resource ARM: mxs/imx28: remove now unused clock lookup "fec.0" ARM: mxs: fix clock base address missing ARM: mxs: acknowledge gpio irq ARM: mach-imx/mach-mx25_3ds: Fix section type ARM: imx: Add VPR200 and MX51_3DS entries to uncompress.h ARM i.MX23: use correct register for setting the rate ARM i.MX23/28: remove secondary field from struct clk. It's unused ARM i.MX28: use correct register for setting the rate ARM i.MX28: fix bit operation
This commit is contained in:
commit
65d9055ea3
@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
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static struct resource ep93xx_ac97_resources[] = {
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{
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.start = EP93XX_AAC_PHYS_BASE,
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.end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1,
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.end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
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KEY(3, 3, KEY_POWER),
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};
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static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = {
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static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
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.keymap = mx25pdk_keymap,
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.keymap_size = ARRAY_SIZE(mx25pdk_keymap),
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};
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@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
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reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
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reg &= ~BM_CLKCTRL_##dr##_DIV; \
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reg |= div << BP_CLKCTRL_##dr##_DIV; \
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if (reg | (1 << clk->enable_shift)) { \
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if (reg & (1 << clk->enable_shift)) { \
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pr_err("%s: clock is gated\n", __func__); \
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return -EINVAL; \
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} \
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@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
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{ \
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if (parent != clk->parent) { \
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__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
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HW_CLKCTRL_CLKSEQ_TOG); \
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CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
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clk->parent = parent; \
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} \
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\
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@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
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} else { \
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reg &= ~BM_CLKCTRL_##dr##_DIV; \
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reg |= div << BP_CLKCTRL_##dr##_DIV; \
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if (reg | (1 << clk->enable_shift)) { \
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if (reg & (1 << clk->enable_shift)) { \
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pr_err("%s: clock is gated\n", __func__); \
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return -EINVAL; \
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} \
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} \
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__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \
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__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
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\
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for (i = 10000; i; i--) \
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if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
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@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
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{ \
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if (parent != clk->parent) { \
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__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
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HW_CLKCTRL_CLKSEQ_TOG); \
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CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
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clk->parent = parent; \
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} \
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\
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@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("duart", NULL, uart_clk)
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_REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
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_REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
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_REGISTER_CLOCK("fec.0", NULL, fec_clk)
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_REGISTER_CLOCK("rtc", NULL, rtc_clk)
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_REGISTER_CLOCK("pll2", NULL, pll2_clk)
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_REGISTER_CLOCK(NULL, "hclk", hbus_clk)
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@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
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if (clk->disable)
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clk->disable(clk);
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__clk_disable(clk->parent);
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__clk_disable(clk->secondary);
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}
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}
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@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
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if (clk->usecount++ == 0) {
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__clk_enable(clk->parent);
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__clk_enable(clk->secondary);
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if (clk->enable)
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clk->enable(clk);
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@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
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struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
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u32 gpio_irq_no_base = port->virtual_irq_start;
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
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__raw_readl(port->base + PINCTRL_IRQEN(port->id));
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@ -29,8 +29,6 @@ struct clk {
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int id;
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/* Source clock this clk depends on */
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struct clk *parent;
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/* Secondary clock to enable/disable with this clock */
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struct clk *secondary;
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/* Reference count of clock enable/disable */
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__s8 usecount;
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/* Register bit position for clock's enable/disable control. */
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@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
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case MACH_TYPE_MX35_3DS:
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case MACH_TYPE_PCM043:
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case MACH_TYPE_LILLY1131:
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case MACH_TYPE_VPR200:
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uart_base = MX3X_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MAGX_ZN5:
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@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
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break;
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case MACH_TYPE_MX51_BABBAGE:
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case MACH_TYPE_EUKREA_CPUIMX51SD:
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case MACH_TYPE_MX51_3DS:
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uart_base = MX51_UART1_BASE_ADDR;
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break;
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case MACH_TYPE_MX50_RDP:
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@ -12,7 +12,7 @@
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#
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# http://www.arm.linux.org.uk/developer/machines/?action=new
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#
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# Last update: Sun Dec 12 23:24:27 2010
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# Last update: Mon Feb 7 08:59:27 2011
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#
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# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
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#
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@ -2240,7 +2240,7 @@ arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
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vs_v210 MACH_VS_V210 VS_V210 2252
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vs_v212 MACH_VS_V212 VS_V212 2253
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hmt MACH_HMT HMT 2254
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suen3 MACH_SUEN3 SUEN3 2255
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km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
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vesper MACH_VESPER VESPER 2256
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str9 MACH_STR9 STR9 2257
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omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
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@ -2987,7 +2987,7 @@ pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
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ea20 MACH_EA20 EA20 3002
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awm2 MACH_AWM2 AWM2 3003
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ti8148evm MACH_TI8148EVM TI8148EVM 3004
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tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005
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seaboard MACH_SEABOARD SEABOARD 3005
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linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
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tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
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rubys MACH_RUBYS RUBYS 3008
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@ -3190,7 +3190,7 @@ synergy MACH_SYNERGY SYNERGY 3205
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ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
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wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
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punica MACH_PUNICA PUNICA 3208
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sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209
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trimslice MACH_TRIMSLICE TRIMSLICE 3209
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mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
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mackerel MACH_MACKEREL MACKEREL 3211
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fa9x27 MACH_FA9X27 FA9X27 3213
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@ -3219,3 +3219,100 @@ pivicc MACH_PIVICC PIVICC 3235
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pcm048 MACH_PCM048 PCM048 3236
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dds MACH_DDS DDS 3237
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chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
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ts48xx MACH_TS48XX TS48XX 3239
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tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
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whistler MACH_WHISTLER WHISTLER 3241
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asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
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at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
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ddplug MACH_DDPLUG DDPLUG 3244
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d2plug MACH_D2PLUG D2PLUG 3245
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kzm9d MACH_KZM9D KZM9D 3246
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verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
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nanozoom MACH_NANOZOOM NANOZOOM 3248
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dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
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dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
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anchovy MACH_ANCHOVY ANCHOVY 3251
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re2rev20 MACH_RE2REV20 RE2REV20 3253
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re2rev21 MACH_RE2REV21 RE2REV21 3254
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cns21xx MACH_CNS21XX CNS21XX 3255
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rider MACH_RIDER RIDER 3257
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nsk330 MACH_NSK330 NSK330 3258
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cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
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z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
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z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
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beect MACH_BEECT BEECT 3262
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dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
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omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
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mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
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mione MACH_MIONE MIONE 3266
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top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
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top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
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kingdom MACH_KINGDOM KINGDOM 3269
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armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
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lq2 MACH_LQ2 LQ2 3271
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sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
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mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
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acer_a8 MACH_ACER_A8 ACER_A8 3275
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acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
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guppy MACH_GUPPY GUPPY 3277
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mx61_ard MACH_MX61_ARD MX61_ARD 3278
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tx53 MACH_TX53 TX53 3279
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omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
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uemd MACH_UEMD UEMD 3281
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ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
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rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
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nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
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hkdkc100 MACH_HKDKC100 HKDKC100 3285
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ts42xx MACH_TS42XX TS42XX 3286
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aebl MACH_AEBL AEBL 3287
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wario MACH_WARIO WARIO 3288
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gfs_spm MACH_GFS_SPM GFS_SPM 3289
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cm_t3730 MACH_CM_T3730 CM_T3730 3290
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isc3 MACH_ISC3 ISC3 3291
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rascal MACH_RASCAL RASCAL 3292
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hrefv60 MACH_HREFV60 HREFV60 3293
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tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
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pyramid_td MACH_PYRAMID_TD PYRAMID_TD 3295
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splendor MACH_SPLENDOR SPLENDOR 3296
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guf_planet MACH_GUF_PLANET GUF_PLANET 3297
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msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
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htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
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athene MACH_ATHENE ATHENE 3300
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deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
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vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
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nery_1000 MACH_NERY_1000 NERY_1000 3303
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rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
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nmh MACH_NMH NMH 3305
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wn802t MACH_WN802T WN802T 3306
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dragonet MACH_DRAGONET DRAGONET 3307
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geneva_b MACH_GENEVA_B GENEVA_B 3308
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at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
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bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
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bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
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koi MACH_KOI KOI 3312
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ts4800 MACH_TS4800 TS4800 3313
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tqma9263 MACH_TQMA9263 TQMA9263 3314
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holiday MACH_HOLIDAY HOLIDAY 3315
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dma_6410 MACH_DMA6410 DMA6410 3316
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pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
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hwgw6410 MACH_HWGW6410 HWGW6410 3318
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shenzhou MACH_SHENZHOU SHENZHOU 3319
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cwme9210 MACH_CWME9210 CWME9210 3320
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cwme9210js MACH_CWME9210JS CWME9210JS 3321
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pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
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colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
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w21 MACH_W21 W21 3324
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polysat1 MACH_POLYSAT1 POLYSAT1 3325
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dataway MACH_DATAWAY DATAWAY 3326
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cobral138 MACH_COBRAL138 COBRAL138 3327
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roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
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marvelc MACH_MARVELC MARVELC 3329
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navefihid MACH_NAVEFIHID NAVEFIHID 3330
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dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
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able MACH_ABLE ABLE 3332
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legacy MACH_LEGACY LEGACY 3333
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icong MACH_ICONG ICONG 3334
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rover_g8 MACH_ROVER_G8 ROVER_G8 3335
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t5388p MACH_T5388P T5388P 3336
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dingo MACH_DINGO DINGO 3337
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goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
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@ -50,7 +50,11 @@ static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
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if (v & SLFR_1RXV)
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readl(aaci->base + AACI_SL1RX);
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writel(maincr, aaci->base + AACI_MAINCR);
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if (maincr != readl(aaci->base + AACI_MAINCR)) {
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writel(maincr, aaci->base + AACI_MAINCR);
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readl(aaci->base + AACI_MAINCR);
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udelay(1);
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}
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}
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/*
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@ -993,6 +997,8 @@ static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
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* disabling the channel doesn't clear the FIFO.
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*/
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writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
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readl(aaci->base + AACI_MAINCR);
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udelay(1);
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writel(aaci->maincr, aaci->base + AACI_MAINCR);
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/*
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Loading…
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Block a user