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x86: Expose init_freq_invariance() to topology header

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The function init_freq_invariance will be used on x86 CPPC, so expose it in
the topology header.

Signed-off-by: Huang Rui <ray.huang@amd.com>
[ rjw: Subject adjustment ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Huang Rui 2022-02-14 18:14:49 +08:00 committed by Rafael J. Wysocki
parent 82d8936914
commit 666f6ecf35
2 changed files with 5 additions and 7 deletions
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4
arch/x86/include/asm/topology.h
View File

@ -215,10 +215,14 @@ extern void arch_scale_freq_tick(void);
#define arch_scale_freq_tick arch_scale_freq_tick
extern void arch_set_max_freq_ratio(bool turbo_disabled);
void init_freq_invariance(bool secondary, bool cppc_ready);
#else
static inline void arch_set_max_freq_ratio(bool turbo_disabled)
{
}
static inline void init_freq_invariance(bool secondary, bool cppc_ready)
{
}
#endif
#if defined(CONFIG_ACPI_CPPC_LIB) && defined(CONFIG_SMP)

8
arch/x86/kernel/smpboot.c
View File

@ -155,8 +155,6 @@ static inline void smpboot_restore_warm_reset_vector(void)
*((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
}
static void init_freq_invariance(bool secondary, bool cppc_ready);
/*
* Report back to the Boot Processor during boot time or to the caller processor
* during CPU online.
@ -2125,7 +2123,7 @@ static void register_freq_invariance_syscore_ops(void)
static inline void register_freq_invariance_syscore_ops(void) {}
#endif
static void init_freq_invariance(bool secondary, bool cppc_ready)
void init_freq_invariance(bool secondary, bool cppc_ready)
{
bool ret = false;
@ -2222,8 +2220,4 @@ error:
pr_warn("Scheduler frequency invariance went wobbly, disabling!\n");
schedule_work(&disable_freq_invariance_work);
}
#else
static inline void init_freq_invariance(bool secondary, bool cppc_ready)
{
}
#endif /* CONFIG_X86_64 */