drm/amd/display: Add NULL test for 'timing generator' in 'dcn21_set_pipe()'
In "u32 otg_inst = pipe_ctx->stream_res.tg->inst;" pipe_ctx->stream_res.tg could be NULL, it is relying on the caller to ensure the tg is not NULL. Fixes: 474ac4a875ca ("drm/amd/display: Implement some asic specific abm call backs.") Cc: Yongqiang Sun <yongqiang.sun@amd.com> Cc: Anthony Koo <Anthony.Koo@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -206,28 +206,32 @@ void dcn21_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx)
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void dcn21_set_pipe(struct pipe_ctx *pipe_ctx)
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{
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struct abm *abm = pipe_ctx->stream_res.abm;
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uint32_t otg_inst = pipe_ctx->stream_res.tg->inst;
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struct timing_generator *tg = pipe_ctx->stream_res.tg;
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struct panel_cntl *panel_cntl = pipe_ctx->stream->link->panel_cntl;
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struct dmcu *dmcu = pipe_ctx->stream->ctx->dc->res_pool->dmcu;
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uint32_t otg_inst;
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if (!abm && !tg && !panel_cntl)
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return;
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otg_inst = tg->inst;
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if (dmcu) {
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dce110_set_pipe(pipe_ctx);
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return;
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}
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if (abm && panel_cntl) {
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if (abm->funcs && abm->funcs->set_pipe_ex) {
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abm->funcs->set_pipe_ex(abm,
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if (abm->funcs && abm->funcs->set_pipe_ex) {
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abm->funcs->set_pipe_ex(abm,
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otg_inst,
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SET_ABM_PIPE_NORMAL,
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panel_cntl->inst,
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panel_cntl->pwrseq_inst);
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} else {
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dmub_abm_set_pipe(abm, otg_inst,
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SET_ABM_PIPE_NORMAL,
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panel_cntl->inst,
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panel_cntl->pwrseq_inst);
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}
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} else {
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dmub_abm_set_pipe(abm, otg_inst,
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SET_ABM_PIPE_NORMAL,
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panel_cntl->inst,
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panel_cntl->pwrseq_inst);
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}
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}
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