net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports
Marvell chips not supporting per-port jumbo frame size configurations use a chip-wide frame size configuration. In the commit referenced with the Fixes tag, the setting is applied just for the last port changing its MTU. While configuring CPU ports accounts for tagger overhead, user ports do not. When setting the MTU for a user port, the chip-wide setting is reduced to not include the tagger overhead, resulting in an potentially insufficient maximum frame size for the CPU port. Specifically, sending full-size frames from the CPU port on a MV88E6097 having a user port MTU of 1500 bytes results in dropped frames. As, by design, the CPU port MTU is adjusted for any user port change, apply the chip-wide setting only for CPU ports. Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU") Suggested-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Martin Willi <martin@strongswan.org> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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@ -3626,7 +3626,8 @@ static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
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mv88e6xxx_reg_lock(chip);
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if (chip->info->ops->port_set_jumbo_size)
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ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu);
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else if (chip->info->ops->set_max_frame_size)
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else if (chip->info->ops->set_max_frame_size &&
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dsa_is_cpu_port(ds, port))
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ret = chip->info->ops->set_max_frame_size(chip, new_mtu);
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mv88e6xxx_reg_unlock(chip);
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