x86/apic: Nuke ack_APIC_irq()
Yet another wrapper of a wrapper gone along with the outdated comment that this compiles to a single instruction. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Wei Liu <wei.liu@kernel.org> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)
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@ -161,7 +161,7 @@ static inline bool hv_reenlightenment_available(void)
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DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_reenlightenment)
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{
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(irq_hv_reenlightenment_count);
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schedule_delayed_work(&hv_reenlightenment_work, HZ/10);
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}
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@ -402,16 +402,6 @@ static inline void apic_set_eoi_cb(void (*eoi)(void)) {}
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extern void apic_ack_irq(struct irq_data *data);
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static inline void ack_APIC_irq(void)
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{
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/*
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* ack_APIC_irq() actually gets compiled as a single instruction
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* ... yummie.
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*/
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apic_eoi();
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}
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static inline bool lapic_vector_set_in_irr(unsigned int vector)
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{
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u32 irr = apic_read(APIC_IRR + (vector / 32 * 0x10));
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@ -1076,7 +1076,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_apic_timer_interrupt)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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ack_APIC_irq();
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apic_eoi();
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trace_local_timer_entry(LOCAL_TIMER_VECTOR);
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local_apic_timer_interrupt();
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trace_local_timer_exit(LOCAL_TIMER_VECTOR);
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@ -1480,7 +1480,7 @@ static bool apic_check_and_ack(union apic_ir *irr, union apic_ir *isr)
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* per set bit.
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*/
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for_each_set_bit(bit, isr->map, APIC_IR_BITS)
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ack_APIC_irq();
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apic_eoi();
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return true;
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}
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@ -1492,7 +1492,7 @@ static bool apic_check_and_ack(union apic_ir *irr, union apic_ir *isr)
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* interrupt from previous kernel might still have ISR bit set.
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*
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* Most probably by now the CPU has serviced that pending interrupt and it
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* might not have done the ack_APIC_irq() because it thought, interrupt
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* might not have done the apic_eoi() because it thought, interrupt
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* came from i8259 as ExtInt. LAPIC did not get EOI so it does not clear
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* the ISR bit and cpu thinks it has already serviced the interrupt. Hence
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* a vector might get locked. It was noticed for timer irq (vector
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@ -2147,7 +2147,7 @@ static noinline void handle_spurious_interrupt(u8 vector)
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if (v & (1 << (vector & 0x1f))) {
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pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Acked\n",
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vector, smp_processor_id());
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ack_APIC_irq();
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apic_eoi();
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} else {
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pr_info("Spurious interrupt (vector 0x%02x) on CPU#%d. Not pending!\n",
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vector, smp_processor_id());
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@ -2198,7 +2198,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_error_interrupt)
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if (lapic_get_maxlvt() > 3) /* Due to the Pentium erratum 3AP. */
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apic_write(APIC_ESR, 0);
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v = apic_read(APIC_ESR);
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ack_APIC_irq();
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apic_eoi();
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atomic_inc(&irq_err_count);
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apic_printk(APIC_DEBUG, KERN_DEBUG "APIC error on CPU%d: %02x",
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@ -1823,7 +1823,7 @@ static void ioapic_ack_level(struct irq_data *irq_data)
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* We must acknowledge the irq before we move it or the acknowledge will
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* not propagate properly.
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*/
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ack_APIC_irq();
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apic_eoi();
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/*
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* Tail end of clearing remote IRR bit (either by delivering the EOI
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@ -2046,7 +2046,7 @@ static void unmask_lapic_irq(struct irq_data *data)
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static void ack_lapic_irq(struct irq_data *data)
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{
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ack_APIC_irq();
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apic_eoi();
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}
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static struct irq_chip lapic_chip __read_mostly = {
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@ -907,7 +907,7 @@ static int apic_retrigger_irq(struct irq_data *irqd)
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void apic_ack_irq(struct irq_data *irqd)
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{
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irq_move_irq(irqd);
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ack_APIC_irq();
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apic_eoi();
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}
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void apic_ack_edge(struct irq_data *irqd)
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@ -51,7 +51,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_acrn_hv_callback)
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* will block the interrupt whose vector is lower than
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* HYPERVISOR_CALLBACK_VECTOR.
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*/
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(irq_hv_callback_count);
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if (acrn_intr_handler)
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@ -759,7 +759,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_deferred_error)
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inc_irq_stat(irq_deferred_error_count);
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deferred_error_int_vector();
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trace_deferred_error_apic_exit(DEFERRED_ERROR_VECTOR);
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ack_APIC_irq();
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apic_eoi();
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}
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/*
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@ -27,5 +27,5 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_threshold)
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inc_irq_stat(irq_threshold_count);
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mce_threshold_vector();
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trace_threshold_apic_exit(THRESHOLD_APIC_VECTOR);
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ack_APIC_irq();
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apic_eoi();
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}
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@ -119,7 +119,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback)
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vmbus_handler();
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if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
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ack_APIC_irq();
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apic_eoi();
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set_irq_regs(old_regs);
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}
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@ -147,7 +147,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0)
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if (hv_stimer0_handler)
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hv_stimer0_handler();
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add_interrupt_randomness(HYPERV_STIMER0_VECTOR);
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ack_APIC_irq();
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apic_eoi();
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set_irq_regs(old_regs);
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}
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@ -49,7 +49,7 @@ void ack_bad_irq(unsigned int irq)
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* completely.
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* But only ack when the APIC is enabled -AK
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*/
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ack_APIC_irq();
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apic_eoi();
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}
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#define irq_stats(x) (&per_cpu(irq_stat, x))
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@ -256,7 +256,7 @@ DEFINE_IDTENTRY_IRQ(common_interrupt)
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if (likely(!IS_ERR_OR_NULL(desc))) {
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handle_irq(desc, regs);
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} else {
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ack_APIC_irq();
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apic_eoi();
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if (desc == VECTOR_UNUSED) {
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pr_emerg_ratelimited("%s: %d.%u No irq handler for vector\n",
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@ -280,7 +280,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_x86_platform_ipi)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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ack_APIC_irq();
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apic_eoi();
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trace_x86_platform_ipi_entry(X86_PLATFORM_IPI_VECTOR);
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inc_irq_stat(x86_platform_ipis);
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if (x86_platform_ipi_callback)
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@ -310,7 +310,7 @@ EXPORT_SYMBOL_GPL(kvm_set_posted_intr_wakeup_handler);
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*/
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DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_ipi)
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{
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(kvm_posted_intr_ipis);
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}
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@ -319,7 +319,7 @@ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_ipi)
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*/
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DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_posted_intr_wakeup_ipi)
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{
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(kvm_posted_intr_wakeup_ipis);
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kvm_posted_intr_wakeup_handler();
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}
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@ -329,7 +329,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_posted_intr_wakeup_ipi)
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*/
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DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_kvm_posted_intr_nested_ipi)
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{
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(kvm_posted_intr_nested_ipis);
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}
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#endif
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@ -401,6 +401,6 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_thermal)
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inc_irq_stat(irq_thermal_count);
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smp_thermal_vector();
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trace_thermal_apic_exit(THERMAL_APIC_VECTOR);
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ack_APIC_irq();
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apic_eoi();
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}
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#endif
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@ -16,7 +16,7 @@
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#ifdef CONFIG_X86_LOCAL_APIC
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DEFINE_IDTENTRY_SYSVEC(sysvec_irq_work)
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{
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ack_APIC_irq();
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apic_eoi();
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trace_irq_work_entry(IRQ_WORK_VECTOR);
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inc_irq_stat(apic_irq_work_irqs);
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irq_work_run();
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@ -291,7 +291,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_kvm_asyncpf_interrupt)
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struct pt_regs *old_regs = set_irq_regs(regs);
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u32 token;
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(irq_hv_callback_count);
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@ -135,7 +135,7 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs)
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*/
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DEFINE_IDTENTRY_SYSVEC(sysvec_reboot)
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{
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ack_APIC_irq();
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apic_eoi();
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cpu_emergency_disable_virtualization();
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stop_this_cpu(NULL);
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}
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@ -268,7 +268,7 @@ done:
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*/
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DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi)
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{
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ack_APIC_irq();
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apic_eoi();
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trace_reschedule_entry(RESCHEDULE_VECTOR);
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inc_irq_stat(irq_resched_count);
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scheduler_ipi();
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@ -277,7 +277,7 @@ DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi)
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DEFINE_IDTENTRY_SYSVEC(sysvec_call_function)
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{
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ack_APIC_irq();
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apic_eoi();
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trace_call_function_entry(CALL_FUNCTION_VECTOR);
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inc_irq_stat(irq_call_count);
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generic_smp_call_function_interrupt();
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@ -286,7 +286,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_call_function)
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DEFINE_IDTENTRY_SYSVEC(sysvec_call_function_single)
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{
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ack_APIC_irq();
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apic_eoi();
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trace_call_function_single_entry(CALL_FUNCTION_SINGLE_VECTOR);
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inc_irq_stat(irq_call_count);
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generic_smp_call_function_single_interrupt();
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@ -132,7 +132,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_xen_hvm_callback)
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struct pt_regs *old_regs = set_irq_regs(regs);
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if (xen_percpu_upcall)
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ack_APIC_irq();
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apic_eoi();
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inc_irq_stat(irq_hv_callback_count);
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