staging: comedi: ni_tio_internal.h: replace NITIO_Gi_SW_Save_Reg()
The "SW Save" registers are sequential in the enum ni_gpct_register. Replace this inline CamelCase function with a simple define. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1648,15 +1648,14 @@ int ni_tio_rinsn(struct ni_gpct *counter, struct comedi_insn *insn,
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a third read will be correct since the count value will definitely have latched by then. */
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first_read =
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read_register(counter,
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NITIO_Gi_SW_Save_Reg(counter->counter_index));
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NITIO_SW_SAVE_REG(counter->counter_index));
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second_read =
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read_register(counter,
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NITIO_Gi_SW_Save_Reg(counter->counter_index));
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NITIO_SW_SAVE_REG(counter->counter_index));
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if (first_read != second_read)
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correct_read =
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read_register(counter,
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NITIO_Gi_SW_Save_Reg(counter->
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counter_index));
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NITIO_SW_SAVE_REG(counter->counter_index));
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else
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correct_read = first_read;
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data[0] = correct_read;
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@ -23,6 +23,7 @@
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#define NITIO_AUTO_INC_REG(x) (NITIO_G0_AUTO_INC + (x))
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#define NITIO_CMD_REG(x) (NITIO_G0_CMD + (x))
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#define NITIO_SW_SAVE_REG(x) (NITIO_G0_SW_SAVE + (x))
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static inline enum ni_gpct_register NITIO_Gi_Counting_Mode_Reg(unsigned idx)
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{
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@ -151,21 +152,6 @@ static inline enum ni_gpct_register NITIO_Gi_Mode_Reg(unsigned idx)
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return 0;
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}
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static inline enum ni_gpct_register NITIO_Gi_SW_Save_Reg(int idx)
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{
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switch (idx) {
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case 0:
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return NITIO_G0_SW_SAVE;
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case 1:
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return NITIO_G1_SW_SAVE;
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case 2:
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return NITIO_G2_SW_SAVE;
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case 3:
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return NITIO_G3_SW_SAVE;
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}
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return 0;
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}
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static inline enum ni_gpct_register NITIO_Gi_Second_Gate_Reg(unsigned idx)
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{
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switch (idx) {
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