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drm/amd/powerplay: partial revert commit 01b0e7fb1.

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when uvd is idle, we gate uvd clock.
and uvd is busy, we ungate uvd clock.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2016-11-08 20:38:28 +08:00 committed by Alex Deucher
parent 0401eb403d
commit 68260f340e
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
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@ -149,7 +149,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
if (bgate) {
cgs_set_clockgating_state(hwmgr->device,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_UNGATE);
AMD_CG_STATE_GATE);
cgs_set_powergating_state(hwmgr->device,
AMD_IP_BLOCK_TYPE_UVD,
AMD_PG_STATE_GATE);
@ -162,7 +162,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
AMD_CG_STATE_UNGATE);
cgs_set_clockgating_state(hwmgr->device,
AMD_IP_BLOCK_TYPE_UVD,
AMD_CG_STATE_GATE);
AMD_CG_STATE_UNGATE);
smu7_update_uvd_dpm(hwmgr, false);
}