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phy: qcom-m31: Add compatible, phy init sequence for IPQ5018

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Add phy init sequence and compatible string for IPQ5018
chipset.

Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Link: https://lore.kernel.org/r/20230904063635.24975-3-quic_nsekar@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Nitheesh Sekar 2023-09-04 12:06:33 +05:30 committed by Vinod Koul
parent 1852dfaacd
commit 68320e35f8
1 changed files with 51 additions and 0 deletions
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51
drivers/phy/qualcomm/phy-qcom-m31.c
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@ -82,6 +82,50 @@ struct m31_priv_data {
unsigned int nregs;
};
static const struct m31_phy_regs m31_ipq5018_regs[] = {
{
.off = USB_PHY_CFG0,
.val = UTMI_PHY_OVERRIDE_EN
},
{
.off = USB_PHY_UTMI_CTRL5,
.val = POR_EN,
.delay = 15
},
{
.off = USB_PHY_FSEL_SEL,
.val = FREQ_SEL
},
{
.off = USB_PHY_HS_PHY_CTRL_COMMON0,
.val = COMMONONN | FSEL | RETENABLEN
},
{
.off = USB_PHY_REFCLK_CTRL,
.val = CLKCORE
},
{
.off = USB_PHY_UTMI_CTRL5,
.val = POR_EN
},
{
.off = USB_PHY_HS_PHY_CTRL2,
.val = USB2_SUSPEND_N_SEL | USB2_SUSPEND_N | USB2_UTMI_CLK_EN
},
{
.off = USB_PHY_UTMI_CTRL5,
.val = 0x0
},
{
.off = USB_PHY_HS_PHY_CTRL2,
.val = USB2_SUSPEND_N | USB2_UTMI_CLK_EN
},
{
.off = USB_PHY_CFG0,
.val = 0x0
},
};
struct m31_phy_regs m31_ipq5332_regs[] = {
{
USB_PHY_CFG0,
@ -268,6 +312,12 @@ static int m31usb_phy_probe(struct platform_device *pdev)
return PTR_ERR_OR_ZERO(phy_provider);
}
static const struct m31_priv_data m31_ipq5018_data = {
.ulpi_mode = false,
.regs = m31_ipq5018_regs,
.nregs = ARRAY_SIZE(m31_ipq5018_regs),
};
static const struct m31_priv_data m31_ipq5332_data = {
.ulpi_mode = false,
.regs = m31_ipq5332_regs,
@ -275,6 +325,7 @@ static const struct m31_priv_data m31_ipq5332_data = {
};
static const struct of_device_id m31usb_phy_id_table[] = {
{ .compatible = "qcom,ipq5018-usb-hsphy", .data = &m31_ipq5018_data },
{ .compatible = "qcom,ipq5332-usb-hsphy", .data = &m31_ipq5332_data },
{ },
};