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drm/xe: Use packed bitfields for xe->info feature flags

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Replace 'bool' fields with single bits to allow the various device
feature flags to pack more tightly.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20230410183910.2696628-1-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matt Roper 2023-04-10 11:39:08 -07:00 committed by Rodrigo Vivi
parent 67f2f0d737
commit 689f40f520
1 changed files with 10 additions and 9 deletions
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19
drivers/gpu/drm/xe/xe_device_types.h
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@ -61,8 +61,6 @@ struct xe_device {
u32 media_verx100;
/** @mem_region_mask: mask of valid memory regions */
u32 mem_region_mask;
/** @is_dgfx: is discrete device */
bool is_dgfx;
/** @platform: XE platform enum */
enum xe_platform platform;
/** @subplatform: XE subplatform enum */
@ -81,20 +79,23 @@ struct xe_device {
u8 tile_count;
/** @vm_max_level: Max VM level */
u8 vm_max_level;
/** @is_dgfx: is discrete device */
u8 is_dgfx:1;
/** @supports_usm: Supports unified shared memory */
bool supports_usm;
u8 supports_usm:1;
/** @has_asid: Has address space ID */
bool has_asid;
u8 has_asid:1;
/** @enable_guc: GuC submission enabled */
bool enable_guc;
u8 enable_guc:1;
/** @has_flat_ccs: Whether flat CCS metadata is used */
bool has_flat_ccs;
u8 has_flat_ccs:1;
/** @has_4tile: Whether tile-4 tiling is supported */
bool has_4tile;
u8 has_4tile:1;
/** @has_range_tlb_invalidation: Has range based TLB invalidations */
bool has_range_tlb_invalidation;
u8 has_range_tlb_invalidation:1;
/** @has_link_copy_engines: Whether the platform has link copy engines */
bool has_link_copy_engine;
u8 has_link_copy_engine:1;
} info;
/** @irq: device interrupt state */