bpf/tests: Add exhaustive tests of ALU shift values
This patch adds a set of tests for ALU64 and ALU32 shift operations to verify correctness for all possible values of the shift value. Mainly intended for JIT testing. Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20210914091842.4186267-4-johan.almbladh@anyfinetworks.com
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lib/test_bpf.c
260
lib/test_bpf.c
@ -497,6 +497,168 @@ static int bpf_fill_long_jmp(struct bpf_test *self)
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return 0;
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}
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static int __bpf_ld_imm64(struct bpf_insn insns[2], u8 reg, s64 imm64)
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{
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struct bpf_insn tmp[] = {BPF_LD_IMM64(reg, imm64)};
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memcpy(insns, tmp, sizeof(tmp));
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return 2;
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}
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/* Test an ALU shift operation for all valid shift values */
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static int __bpf_fill_alu_shift(struct bpf_test *self, u8 op,
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u8 mode, bool alu32)
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{
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static const s64 regs[] = {
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0x0123456789abcdefLL, /* dword > 0, word < 0 */
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0xfedcba9876543210LL, /* dowrd < 0, word > 0 */
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0xfedcba0198765432LL, /* dowrd < 0, word < 0 */
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0x0123458967abcdefLL, /* dword > 0, word > 0 */
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};
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int bits = alu32 ? 32 : 64;
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int len = (2 + 7 * bits) * ARRAY_SIZE(regs) + 3;
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struct bpf_insn *insn;
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int imm, k;
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int i = 0;
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insn = kmalloc_array(len, sizeof(*insn), GFP_KERNEL);
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if (!insn)
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return -ENOMEM;
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insn[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 0);
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for (k = 0; k < ARRAY_SIZE(regs); k++) {
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s64 reg = regs[k];
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i += __bpf_ld_imm64(&insn[i], R3, reg);
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for (imm = 0; imm < bits; imm++) {
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u64 val;
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/* Perform operation */
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insn[i++] = BPF_ALU64_REG(BPF_MOV, R1, R3);
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insn[i++] = BPF_ALU64_IMM(BPF_MOV, R2, imm);
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if (alu32) {
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if (mode == BPF_K)
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insn[i++] = BPF_ALU32_IMM(op, R1, imm);
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else
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insn[i++] = BPF_ALU32_REG(op, R1, R2);
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switch (op) {
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case BPF_LSH:
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val = (u32)reg << imm;
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break;
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case BPF_RSH:
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val = (u32)reg >> imm;
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break;
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case BPF_ARSH:
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val = (u32)reg >> imm;
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if (imm > 0 && (reg & 0x80000000))
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val |= ~(u32)0 << (32 - imm);
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break;
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}
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} else {
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if (mode == BPF_K)
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insn[i++] = BPF_ALU64_IMM(op, R1, imm);
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else
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insn[i++] = BPF_ALU64_REG(op, R1, R2);
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switch (op) {
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case BPF_LSH:
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val = (u64)reg << imm;
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break;
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case BPF_RSH:
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val = (u64)reg >> imm;
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break;
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case BPF_ARSH:
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val = (u64)reg >> imm;
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if (imm > 0 && reg < 0)
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val |= ~(u64)0 << (64 - imm);
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break;
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}
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}
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/*
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* When debugging a JIT that fails this test, one
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* can write the immediate value to R0 here to find
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* out which operand values that fail.
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*/
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/* Load reference and check the result */
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i += __bpf_ld_imm64(&insn[i], R4, val);
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insn[i++] = BPF_JMP_REG(BPF_JEQ, R1, R4, 1);
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insn[i++] = BPF_EXIT_INSN();
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}
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}
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insn[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 1);
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insn[i++] = BPF_EXIT_INSN();
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self->u.ptr.insns = insn;
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self->u.ptr.len = len;
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BUG_ON(i > len);
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return 0;
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}
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static int bpf_fill_alu_lsh_imm(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_LSH, BPF_K, false);
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}
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static int bpf_fill_alu_rsh_imm(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_RSH, BPF_K, false);
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}
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static int bpf_fill_alu_arsh_imm(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_K, false);
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}
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static int bpf_fill_alu_lsh_reg(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_LSH, BPF_X, false);
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}
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static int bpf_fill_alu_rsh_reg(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_RSH, BPF_X, false);
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}
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static int bpf_fill_alu_arsh_reg(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_X, false);
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}
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static int bpf_fill_alu32_lsh_imm(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_LSH, BPF_K, true);
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}
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static int bpf_fill_alu32_rsh_imm(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_RSH, BPF_K, true);
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}
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static int bpf_fill_alu32_arsh_imm(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_K, true);
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}
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static int bpf_fill_alu32_lsh_reg(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_LSH, BPF_X, true);
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}
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static int bpf_fill_alu32_rsh_reg(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_RSH, BPF_X, true);
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}
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static int bpf_fill_alu32_arsh_reg(struct bpf_test *self)
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{
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return __bpf_fill_alu_shift(self, BPF_ARSH, BPF_X, true);
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}
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static struct bpf_test tests[] = {
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{
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"TAX",
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@ -8414,6 +8576,104 @@ static struct bpf_test tests[] = {
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{},
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{ { 0, 2 } },
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},
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/* Exhaustive test of ALU64 shift operations */
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{
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"ALU64_LSH_K: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu_lsh_imm,
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},
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{
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"ALU64_RSH_K: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu_rsh_imm,
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},
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{
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"ALU64_ARSH_K: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu_arsh_imm,
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},
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{
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"ALU64_LSH_X: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu_lsh_reg,
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},
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{
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"ALU64_RSH_X: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu_rsh_reg,
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},
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{
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"ALU64_ARSH_X: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu_arsh_reg,
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},
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/* Exhaustive test of ALU32 shift operations */
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{
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"ALU32_LSH_K: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu32_lsh_imm,
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},
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{
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"ALU32_RSH_K: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu32_rsh_imm,
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},
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{
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"ALU32_ARSH_K: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu32_arsh_imm,
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},
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{
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"ALU32_LSH_X: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu32_lsh_reg,
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},
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{
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"ALU32_RSH_X: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu32_rsh_reg,
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},
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{
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"ALU32_ARSH_X: all shift values",
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{ },
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INTERNAL | FLAG_NO_DATA,
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{ },
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{ { 0, 1 } },
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.fill_helper = bpf_fill_alu32_arsh_reg,
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},
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};
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static struct net_device dev;
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