dmaengine-fix-5.0-rc6
dmaengine fixes for v5.0-rc6 - Fix in at_xdmac fr wrongful channel state - Fix for imx driver for wrong callback invocation - Fix to bcm driver for interrupt race & transaction abort. - Fix in dmatest to abort in mapping error -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcYD8SAAoJEHwUBw8lI4NHqc0P/At5/XRhS60fnsibTEnGH3ee I3TQY3DrGXHXUAq8LqVIjaql7NUQ+I07bRtP6JMX9GYrTguUVVDPau6E4CtWt571 +TnKXQefgY/UlP9f5K127Dal5YNaYsBZqbEvhE2xgYKrsFStiIYDFIPGFeIE841E J0cm8mjM+dQxZOXCCf/vSxA9h2Aqj7Fa4RRY3Sj4r/CWahaKpZt+OM6bdDpmUxmq PzDLSE4DdHLWZSTcvAFQQtwlMc4Dq8a7cs2MmCvLC2jwGq0IgLr0bfzj6pZOqcuN O05TNcyhQHZ5YRnBHTgJUSgR2abhKuNnBWN/pA1Tbsn7+OISsvt4erjITAFv6fwR mkWgyAzH3tZ1PnO1YO43KEfy/nrT6Veg1xePTzWaaYAsPJ9FJeQJuZ5YxPysOLcn lux2/B19HeWVb02vredn5eUXH7b8C0WQhfEax4hgbbPcaDX+y3WFN0n2gxOAFQ8H xloKu511Iuu0Uteov4wys6LucqX61vPPank9Ma2N7RLdZ4x2Ya8gDjG/kfQOFHDa jRbbjzw8Q5tuU2++GXwSpWq55LOKYnaXQbUIRWxrrdwAJahKAQFW++KR2ehB1kvS pCaIWwpSHXmCbat/A1JfcYMagAtw6QSgbJlNwru1B7OYujFMLml+GXtqeA/kJ8yo 3+oF8PB0xA+++o83USaa =NTGY -----END PGP SIGNATURE----- Merge tag 'dmaengine-fix-5.0-rc6' of git://git.infradead.org/users/vkoul/slave-dma Pull dmaengine fixes from Vinod Koul: - Fix in at_xdmac fr wrongful channel state - Fix for imx driver for wrong callback invocation - Fix to bcm driver for interrupt race & transaction abort. - Fix in dmatest to abort in mapping error * tag 'dmaengine-fix-5.0-rc6' of git://git.infradead.org/users/vkoul/slave-dma: dmaengine: dmatest: Abort test in case of mapping error dmaengine: bcm2835: Fix abort of transactions dmaengine: bcm2835: Fix interrupt race on RT dmaengine: imx-dma: fix wrong callback invoke dmaengine: at_xdmac: Fix wrongfull report of a channel as in use
This commit is contained in:
Linus Torvalds
commit
68d94a8424
@ -203,6 +203,7 @@ struct at_xdmac_chan {
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u32 save_cim;
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u32 save_cnda;
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u32 save_cndc;
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u32 irq_status;
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unsigned long status;
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struct tasklet_struct tasklet;
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struct dma_slave_config sconfig;
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@ -1580,8 +1581,8 @@ static void at_xdmac_tasklet(unsigned long data)
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struct at_xdmac_desc *desc;
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u32 error_mask;
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dev_dbg(chan2dev(&atchan->chan), "%s: status=0x%08lx\n",
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__func__, atchan->status);
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dev_dbg(chan2dev(&atchan->chan), "%s: status=0x%08x\n",
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__func__, atchan->irq_status);
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error_mask = AT_XDMAC_CIS_RBEIS
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| AT_XDMAC_CIS_WBEIS
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@ -1589,15 +1590,15 @@ static void at_xdmac_tasklet(unsigned long data)
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if (at_xdmac_chan_is_cyclic(atchan)) {
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at_xdmac_handle_cyclic(atchan);
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} else if ((atchan->status & AT_XDMAC_CIS_LIS)
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|| (atchan->status & error_mask)) {
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} else if ((atchan->irq_status & AT_XDMAC_CIS_LIS)
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|| (atchan->irq_status & error_mask)) {
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struct dma_async_tx_descriptor *txd;
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if (atchan->status & AT_XDMAC_CIS_RBEIS)
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if (atchan->irq_status & AT_XDMAC_CIS_RBEIS)
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dev_err(chan2dev(&atchan->chan), "read bus error!!!");
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if (atchan->status & AT_XDMAC_CIS_WBEIS)
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if (atchan->irq_status & AT_XDMAC_CIS_WBEIS)
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dev_err(chan2dev(&atchan->chan), "write bus error!!!");
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if (atchan->status & AT_XDMAC_CIS_ROIS)
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if (atchan->irq_status & AT_XDMAC_CIS_ROIS)
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dev_err(chan2dev(&atchan->chan), "request overflow error!!!");
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spin_lock(&atchan->lock);
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@ -1652,7 +1653,7 @@ static irqreturn_t at_xdmac_interrupt(int irq, void *dev_id)
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atchan = &atxdmac->chan[i];
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chan_imr = at_xdmac_chan_read(atchan, AT_XDMAC_CIM);
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chan_status = at_xdmac_chan_read(atchan, AT_XDMAC_CIS);
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atchan->status = chan_status & chan_imr;
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atchan->irq_status = chan_status & chan_imr;
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dev_vdbg(atxdmac->dma.dev,
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"%s: chan%d: imr=0x%x, status=0x%x\n",
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__func__, i, chan_imr, chan_status);
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@ -1666,7 +1667,7 @@ static irqreturn_t at_xdmac_interrupt(int irq, void *dev_id)
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at_xdmac_chan_read(atchan, AT_XDMAC_CDA),
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at_xdmac_chan_read(atchan, AT_XDMAC_CUBC));
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if (atchan->status & (AT_XDMAC_CIS_RBEIS | AT_XDMAC_CIS_WBEIS))
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if (atchan->irq_status & (AT_XDMAC_CIS_RBEIS | AT_XDMAC_CIS_WBEIS))
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at_xdmac_write(atxdmac, AT_XDMAC_GD, atchan->mask);
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tasklet_schedule(&atchan->tasklet);
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@ -406,38 +406,32 @@ static void bcm2835_dma_fill_cb_chain_with_sg(
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}
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}
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static int bcm2835_dma_abort(void __iomem *chan_base)
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static int bcm2835_dma_abort(struct bcm2835_chan *c)
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{
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unsigned long cs;
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void __iomem *chan_base = c->chan_base;
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long int timeout = 10000;
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cs = readl(chan_base + BCM2835_DMA_CS);
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if (!(cs & BCM2835_DMA_ACTIVE))
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/*
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* A zero control block address means the channel is idle.
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* (The ACTIVE flag in the CS register is not a reliable indicator.)
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*/
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if (!readl(chan_base + BCM2835_DMA_ADDR))
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return 0;
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/* Write 0 to the active bit - Pause the DMA */
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writel(0, chan_base + BCM2835_DMA_CS);
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/* Wait for any current AXI transfer to complete */
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while ((cs & BCM2835_DMA_ISPAUSED) && --timeout) {
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while ((readl(chan_base + BCM2835_DMA_CS) &
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BCM2835_DMA_WAITING_FOR_WRITES) && --timeout)
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cpu_relax();
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cs = readl(chan_base + BCM2835_DMA_CS);
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}
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/* We'll un-pause when we set of our next DMA */
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/* Peripheral might be stuck and fail to signal AXI write responses */
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if (!timeout)
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return -ETIMEDOUT;
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if (!(cs & BCM2835_DMA_ACTIVE))
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return 0;
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/* Terminate the control block chain */
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writel(0, chan_base + BCM2835_DMA_NEXTCB);
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/* Abort the whole DMA */
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writel(BCM2835_DMA_ABORT | BCM2835_DMA_ACTIVE,
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chan_base + BCM2835_DMA_CS);
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dev_err(c->vc.chan.device->dev,
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"failed to complete outstanding writes\n");
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writel(BCM2835_DMA_RESET, chan_base + BCM2835_DMA_CS);
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return 0;
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}
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@ -476,8 +470,15 @@ static irqreturn_t bcm2835_dma_callback(int irq, void *data)
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spin_lock_irqsave(&c->vc.lock, flags);
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/* Acknowledge interrupt */
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writel(BCM2835_DMA_INT, c->chan_base + BCM2835_DMA_CS);
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/*
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* Clear the INT flag to receive further interrupts. Keep the channel
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* active in case the descriptor is cyclic or in case the client has
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* already terminated the descriptor and issued a new one. (May happen
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* if this IRQ handler is threaded.) If the channel is finished, it
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* will remain idle despite the ACTIVE flag being set.
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*/
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writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE,
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c->chan_base + BCM2835_DMA_CS);
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d = c->desc;
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@ -485,11 +486,7 @@ static irqreturn_t bcm2835_dma_callback(int irq, void *data)
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if (d->cyclic) {
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/* call the cyclic callback */
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vchan_cyclic_callback(&d->vd);
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/* Keep the DMA engine running */
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writel(BCM2835_DMA_ACTIVE,
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c->chan_base + BCM2835_DMA_CS);
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} else {
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} else if (!readl(c->chan_base + BCM2835_DMA_ADDR)) {
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vchan_cookie_complete(&c->desc->vd);
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bcm2835_dma_start_desc(c);
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}
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@ -779,7 +776,6 @@ static int bcm2835_dma_terminate_all(struct dma_chan *chan)
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_dmadev *d = to_bcm2835_dma_dev(c->vc.chan.device);
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unsigned long flags;
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int timeout = 10000;
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LIST_HEAD(head);
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spin_lock_irqsave(&c->vc.lock, flags);
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@ -789,27 +785,11 @@ static int bcm2835_dma_terminate_all(struct dma_chan *chan)
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list_del_init(&c->node);
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spin_unlock(&d->lock);
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/*
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* Stop DMA activity: we assume the callback will not be called
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* after bcm_dma_abort() returns (even if it does, it will see
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* c->desc is NULL and exit.)
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*/
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/* stop DMA activity */
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if (c->desc) {
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vchan_terminate_vdesc(&c->desc->vd);
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c->desc = NULL;
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bcm2835_dma_abort(c->chan_base);
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/* Wait for stopping */
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while (--timeout) {
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if (!(readl(c->chan_base + BCM2835_DMA_CS) &
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BCM2835_DMA_ACTIVE))
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break;
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cpu_relax();
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}
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if (!timeout)
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dev_err(d->ddev.dev, "DMA transfer could not be terminated\n");
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bcm2835_dma_abort(c);
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}
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vchan_get_all_descriptors(&c->vc, &head);
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@ -711,11 +711,9 @@ static int dmatest_func(void *data)
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srcs[i] = um->addr[i] + src_off;
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ret = dma_mapping_error(dev->dev, um->addr[i]);
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if (ret) {
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dmaengine_unmap_put(um);
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result("src mapping error", total_tests,
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src_off, dst_off, len, ret);
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failed_tests++;
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continue;
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goto error_unmap_continue;
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}
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um->to_cnt++;
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}
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@ -730,11 +728,9 @@ static int dmatest_func(void *data)
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DMA_BIDIRECTIONAL);
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ret = dma_mapping_error(dev->dev, dsts[i]);
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if (ret) {
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dmaengine_unmap_put(um);
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result("dst mapping error", total_tests,
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src_off, dst_off, len, ret);
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failed_tests++;
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continue;
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goto error_unmap_continue;
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}
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um->bidi_cnt++;
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}
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@ -762,12 +758,10 @@ static int dmatest_func(void *data)
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}
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if (!tx) {
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dmaengine_unmap_put(um);
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result("prep error", total_tests, src_off,
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dst_off, len, ret);
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msleep(100);
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failed_tests++;
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continue;
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goto error_unmap_continue;
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}
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done->done = false;
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@ -776,12 +770,10 @@ static int dmatest_func(void *data)
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cookie = tx->tx_submit(tx);
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if (dma_submit_error(cookie)) {
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dmaengine_unmap_put(um);
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result("submit error", total_tests, src_off,
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dst_off, len, ret);
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msleep(100);
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failed_tests++;
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continue;
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goto error_unmap_continue;
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}
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dma_async_issue_pending(chan);
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@ -790,22 +782,20 @@ static int dmatest_func(void *data)
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status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
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dmaengine_unmap_put(um);
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if (!done->done) {
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result("test timed out", total_tests, src_off, dst_off,
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len, 0);
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failed_tests++;
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continue;
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goto error_unmap_continue;
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} else if (status != DMA_COMPLETE) {
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result(status == DMA_ERROR ?
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"completion error status" :
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"completion busy status", total_tests, src_off,
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dst_off, len, ret);
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failed_tests++;
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continue;
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goto error_unmap_continue;
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}
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dmaengine_unmap_put(um);
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if (params->noverify) {
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verbose_result("test passed", total_tests, src_off,
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dst_off, len, 0);
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@ -846,6 +836,12 @@ static int dmatest_func(void *data)
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verbose_result("test passed", total_tests, src_off,
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dst_off, len, 0);
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}
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continue;
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error_unmap_continue:
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dmaengine_unmap_put(um);
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failed_tests++;
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}
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ktime = ktime_sub(ktime_get(), ktime);
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ktime = ktime_sub(ktime, comparetime);
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@ -618,7 +618,7 @@ static void imxdma_tasklet(unsigned long data)
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{
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struct imxdma_channel *imxdmac = (void *)data;
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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struct imxdma_desc *desc;
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struct imxdma_desc *desc, *next_desc;
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unsigned long flags;
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spin_lock_irqsave(&imxdma->lock, flags);
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@ -648,10 +648,10 @@ static void imxdma_tasklet(unsigned long data)
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list_move_tail(imxdmac->ld_active.next, &imxdmac->ld_free);
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if (!list_empty(&imxdmac->ld_queue)) {
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desc = list_first_entry(&imxdmac->ld_queue, struct imxdma_desc,
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node);
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next_desc = list_first_entry(&imxdmac->ld_queue,
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struct imxdma_desc, node);
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list_move_tail(imxdmac->ld_queue.next, &imxdmac->ld_active);
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if (imxdma_xfer_desc(desc) < 0)
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if (imxdma_xfer_desc(next_desc) < 0)
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dev_warn(imxdma->dev, "%s: channel: %d couldn't xfer desc\n",
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__func__, imxdmac->channel);
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}
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