Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits)
  MIPS: Use GCC __builtin_prefetch() to implement prefetch().
  MIPS: Octeon: Serial port fixes for OCTEON simulator.
  MIPS: Octeon: Get rid of early serial.
  MIPS: AR7: prevent race between clock initialization and devices registration
  MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address
  MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
  MIPS: MTX-1: Update defconfig
  MIPS: BCM47xx: Update defconfig
  MIPS: RB532: Update defconfig
  MIPS: AR7: Update defconfig
  RTC: rtc-cmos: Fix binary mode support
  MIPS: Oprofile: Loongson: Cleanup the comments
  MIPS: Oprofile: Loongson: Cleanup of the macros
  MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
  MIPS: Oprofile: Loongson: Remove useless parentheses
  MIPS: Oprofile: Loongson: Unify macro for setting events
  MIPS: nofpu and nodsp only affect CPU0
  MIPS: Clean up tables for bootmem allocation
  MIPS: Coding style cleanups of access of FCSR rounding mode bits
  MIPS: Loongson 2F: Add gpio/gpioilb support
  ...
This commit is contained in:
Linus Torvalds 2010-05-21 15:23:54 -07:00
commit 6969a43473
38 changed files with 3472 additions and 3906 deletions

View File

@ -1075,6 +1075,8 @@ config CPU_LOONGSON2F
bool "Loongson 2F"
depends on SYS_HAS_CPU_LOONGSON2F
select CPU_LOONGSON2
select GENERIC_GPIO
select ARCH_REQUIRE_GPIOLIB
help
The Loongson 2F processor implements the MIPS III instruction set
with many extensions.

View File

@ -36,6 +36,7 @@
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/sysdev.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-au1x00/au1xxx_dbdma.h>
@ -174,10 +175,6 @@ static dbdev_tab_t dbdev_tab[] = {
#define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab)
#ifdef CONFIG_PM
static u32 au1xxx_dbdma_pm_regs[NUM_DBDMA_CHANS + 1][6];
#endif
static chan_tab_t *chan_tab_ptr[NUM_DBDMA_CHANS];
@ -960,29 +957,37 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr)
return nbytes;
}
#ifdef CONFIG_PM
void au1xxx_dbdma_suspend(void)
struct alchemy_dbdma_sysdev {
struct sys_device sysdev;
u32 pm_regs[NUM_DBDMA_CHANS + 1][6];
};
static int alchemy_dbdma_suspend(struct sys_device *dev,
pm_message_t state)
{
struct alchemy_dbdma_sysdev *sdev =
container_of(dev, struct alchemy_dbdma_sysdev, sysdev);
int i;
u32 addr;
addr = DDMA_GLOBAL_BASE;
au1xxx_dbdma_pm_regs[0][0] = au_readl(addr + 0x00);
au1xxx_dbdma_pm_regs[0][1] = au_readl(addr + 0x04);
au1xxx_dbdma_pm_regs[0][2] = au_readl(addr + 0x08);
au1xxx_dbdma_pm_regs[0][3] = au_readl(addr + 0x0c);
sdev->pm_regs[0][0] = au_readl(addr + 0x00);
sdev->pm_regs[0][1] = au_readl(addr + 0x04);
sdev->pm_regs[0][2] = au_readl(addr + 0x08);
sdev->pm_regs[0][3] = au_readl(addr + 0x0c);
/* save channel configurations */
for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) {
au1xxx_dbdma_pm_regs[i][0] = au_readl(addr + 0x00);
au1xxx_dbdma_pm_regs[i][1] = au_readl(addr + 0x04);
au1xxx_dbdma_pm_regs[i][2] = au_readl(addr + 0x08);
au1xxx_dbdma_pm_regs[i][3] = au_readl(addr + 0x0c);
au1xxx_dbdma_pm_regs[i][4] = au_readl(addr + 0x10);
au1xxx_dbdma_pm_regs[i][5] = au_readl(addr + 0x14);
sdev->pm_regs[i][0] = au_readl(addr + 0x00);
sdev->pm_regs[i][1] = au_readl(addr + 0x04);
sdev->pm_regs[i][2] = au_readl(addr + 0x08);
sdev->pm_regs[i][3] = au_readl(addr + 0x0c);
sdev->pm_regs[i][4] = au_readl(addr + 0x10);
sdev->pm_regs[i][5] = au_readl(addr + 0x14);
/* halt channel */
au_writel(au1xxx_dbdma_pm_regs[i][0] & ~1, addr + 0x00);
au_writel(sdev->pm_regs[i][0] & ~1, addr + 0x00);
au_sync();
while (!(au_readl(addr + 0x14) & 1))
au_sync();
@ -992,32 +997,65 @@ void au1xxx_dbdma_suspend(void)
/* disable channel interrupts */
au_writel(0, DDMA_GLOBAL_BASE + 0x0c);
au_sync();
return 0;
}
void au1xxx_dbdma_resume(void)
static int alchemy_dbdma_resume(struct sys_device *dev)
{
struct alchemy_dbdma_sysdev *sdev =
container_of(dev, struct alchemy_dbdma_sysdev, sysdev);
int i;
u32 addr;
addr = DDMA_GLOBAL_BASE;
au_writel(au1xxx_dbdma_pm_regs[0][0], addr + 0x00);
au_writel(au1xxx_dbdma_pm_regs[0][1], addr + 0x04);
au_writel(au1xxx_dbdma_pm_regs[0][2], addr + 0x08);
au_writel(au1xxx_dbdma_pm_regs[0][3], addr + 0x0c);
au_writel(sdev->pm_regs[0][0], addr + 0x00);
au_writel(sdev->pm_regs[0][1], addr + 0x04);
au_writel(sdev->pm_regs[0][2], addr + 0x08);
au_writel(sdev->pm_regs[0][3], addr + 0x0c);
/* restore channel configurations */
for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) {
au_writel(au1xxx_dbdma_pm_regs[i][0], addr + 0x00);
au_writel(au1xxx_dbdma_pm_regs[i][1], addr + 0x04);
au_writel(au1xxx_dbdma_pm_regs[i][2], addr + 0x08);
au_writel(au1xxx_dbdma_pm_regs[i][3], addr + 0x0c);
au_writel(au1xxx_dbdma_pm_regs[i][4], addr + 0x10);
au_writel(au1xxx_dbdma_pm_regs[i][5], addr + 0x14);
au_writel(sdev->pm_regs[i][0], addr + 0x00);
au_writel(sdev->pm_regs[i][1], addr + 0x04);
au_writel(sdev->pm_regs[i][2], addr + 0x08);
au_writel(sdev->pm_regs[i][3], addr + 0x0c);
au_writel(sdev->pm_regs[i][4], addr + 0x10);
au_writel(sdev->pm_regs[i][5], addr + 0x14);
au_sync();
addr += 0x100; /* next channel base */
}
return 0;
}
static struct sysdev_class alchemy_dbdma_sysdev_class = {
.name = "dbdma",
.suspend = alchemy_dbdma_suspend,
.resume = alchemy_dbdma_resume,
};
static int __init alchemy_dbdma_sysdev_init(void)
{
struct alchemy_dbdma_sysdev *sdev;
int ret;
ret = sysdev_class_register(&alchemy_dbdma_sysdev_class);
if (ret)
return ret;
sdev = kzalloc(sizeof(struct alchemy_dbdma_sysdev), GFP_KERNEL);
if (!sdev)
return -ENOMEM;
sdev->sysdev.id = -1;
sdev->sysdev.cls = &alchemy_dbdma_sysdev_class;
ret = sysdev_register(&sdev->sysdev);
if (ret)
kfree(sdev);
return ret;
}
#endif /* CONFIG_PM */
static int __init au1xxx_dbdma_init(void)
{
@ -1046,6 +1084,11 @@ static int __init au1xxx_dbdma_init(void)
else {
dbdma_initialized = 1;
printk(KERN_INFO "Alchemy DBDMA initialized\n");
ret = alchemy_dbdma_sysdev_init();
if (ret) {
printk(KERN_ERR "DBDMA PM init failed\n");
ret = 0;
}
}
return ret;

View File

@ -29,6 +29,8 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/slab.h>
#include <linux/sysdev.h>
#include <asm/irq_cpu.h>
#include <asm/mipsregs.h>
@ -216,90 +218,6 @@ struct au1xxx_irqmap au1200_irqmap[] __initdata = {
};
#ifdef CONFIG_PM
/*
* Save/restore the interrupt controller state.
* Called from the save/restore core registers as part of the
* au_sleep function in power.c.....maybe I should just pm_register()
* them instead?
*/
static unsigned int sleep_intctl_config0[2];
static unsigned int sleep_intctl_config1[2];
static unsigned int sleep_intctl_config2[2];
static unsigned int sleep_intctl_src[2];
static unsigned int sleep_intctl_assign[2];
static unsigned int sleep_intctl_wake[2];
static unsigned int sleep_intctl_mask[2];
void save_au1xxx_intctl(void)
{
sleep_intctl_config0[0] = au_readl(IC0_CFG0RD);
sleep_intctl_config1[0] = au_readl(IC0_CFG1RD);
sleep_intctl_config2[0] = au_readl(IC0_CFG2RD);
sleep_intctl_src[0] = au_readl(IC0_SRCRD);
sleep_intctl_assign[0] = au_readl(IC0_ASSIGNRD);
sleep_intctl_wake[0] = au_readl(IC0_WAKERD);
sleep_intctl_mask[0] = au_readl(IC0_MASKRD);
sleep_intctl_config0[1] = au_readl(IC1_CFG0RD);
sleep_intctl_config1[1] = au_readl(IC1_CFG1RD);
sleep_intctl_config2[1] = au_readl(IC1_CFG2RD);
sleep_intctl_src[1] = au_readl(IC1_SRCRD);
sleep_intctl_assign[1] = au_readl(IC1_ASSIGNRD);
sleep_intctl_wake[1] = au_readl(IC1_WAKERD);
sleep_intctl_mask[1] = au_readl(IC1_MASKRD);
}
/*
* For most restore operations, we clear the entire register and
* then set the bits we found during the save.
*/
void restore_au1xxx_intctl(void)
{
au_writel(0xffffffff, IC0_MASKCLR); au_sync();
au_writel(0xffffffff, IC0_CFG0CLR); au_sync();
au_writel(sleep_intctl_config0[0], IC0_CFG0SET); au_sync();
au_writel(0xffffffff, IC0_CFG1CLR); au_sync();
au_writel(sleep_intctl_config1[0], IC0_CFG1SET); au_sync();
au_writel(0xffffffff, IC0_CFG2CLR); au_sync();
au_writel(sleep_intctl_config2[0], IC0_CFG2SET); au_sync();
au_writel(0xffffffff, IC0_SRCCLR); au_sync();
au_writel(sleep_intctl_src[0], IC0_SRCSET); au_sync();
au_writel(0xffffffff, IC0_ASSIGNCLR); au_sync();
au_writel(sleep_intctl_assign[0], IC0_ASSIGNSET); au_sync();
au_writel(0xffffffff, IC0_WAKECLR); au_sync();
au_writel(sleep_intctl_wake[0], IC0_WAKESET); au_sync();
au_writel(0xffffffff, IC0_RISINGCLR); au_sync();
au_writel(0xffffffff, IC0_FALLINGCLR); au_sync();
au_writel(0x00000000, IC0_TESTBIT); au_sync();
au_writel(0xffffffff, IC1_MASKCLR); au_sync();
au_writel(0xffffffff, IC1_CFG0CLR); au_sync();
au_writel(sleep_intctl_config0[1], IC1_CFG0SET); au_sync();
au_writel(0xffffffff, IC1_CFG1CLR); au_sync();
au_writel(sleep_intctl_config1[1], IC1_CFG1SET); au_sync();
au_writel(0xffffffff, IC1_CFG2CLR); au_sync();
au_writel(sleep_intctl_config2[1], IC1_CFG2SET); au_sync();
au_writel(0xffffffff, IC1_SRCCLR); au_sync();
au_writel(sleep_intctl_src[1], IC1_SRCSET); au_sync();
au_writel(0xffffffff, IC1_ASSIGNCLR); au_sync();
au_writel(sleep_intctl_assign[1], IC1_ASSIGNSET); au_sync();
au_writel(0xffffffff, IC1_WAKECLR); au_sync();
au_writel(sleep_intctl_wake[1], IC1_WAKESET); au_sync();
au_writel(0xffffffff, IC1_RISINGCLR); au_sync();
au_writel(0xffffffff, IC1_FALLINGCLR); au_sync();
au_writel(0x00000000, IC1_TESTBIT); au_sync();
au_writel(sleep_intctl_mask[1], IC1_MASKSET); au_sync();
au_writel(sleep_intctl_mask[0], IC0_MASKSET); au_sync();
}
#endif /* CONFIG_PM */
static void au1x_ic0_unmask(unsigned int irq_nr)
{
unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE;
@ -635,3 +553,91 @@ void __init arch_init_irq(void)
break;
}
}
struct alchemy_ic_sysdev {
struct sys_device sysdev;
void __iomem *base;
unsigned long pmdata[7];
};
static int alchemy_ic_suspend(struct sys_device *dev, pm_message_t state)
{
struct alchemy_ic_sysdev *icdev =
container_of(dev, struct alchemy_ic_sysdev, sysdev);
icdev->pmdata[0] = __raw_readl(icdev->base + IC_CFG0RD);
icdev->pmdata[1] = __raw_readl(icdev->base + IC_CFG1RD);
icdev->pmdata[2] = __raw_readl(icdev->base + IC_CFG2RD);
icdev->pmdata[3] = __raw_readl(icdev->base + IC_SRCRD);
icdev->pmdata[4] = __raw_readl(icdev->base + IC_ASSIGNRD);
icdev->pmdata[5] = __raw_readl(icdev->base + IC_WAKERD);
icdev->pmdata[6] = __raw_readl(icdev->base + IC_MASKRD);
return 0;
}
static int alchemy_ic_resume(struct sys_device *dev)
{
struct alchemy_ic_sysdev *icdev =
container_of(dev, struct alchemy_ic_sysdev, sysdev);
__raw_writel(0xffffffff, icdev->base + IC_MASKCLR);
__raw_writel(0xffffffff, icdev->base + IC_CFG0CLR);
__raw_writel(0xffffffff, icdev->base + IC_CFG1CLR);
__raw_writel(0xffffffff, icdev->base + IC_CFG2CLR);
__raw_writel(0xffffffff, icdev->base + IC_SRCCLR);
__raw_writel(0xffffffff, icdev->base + IC_ASSIGNCLR);
__raw_writel(0xffffffff, icdev->base + IC_WAKECLR);
__raw_writel(0xffffffff, icdev->base + IC_RISINGCLR);
__raw_writel(0xffffffff, icdev->base + IC_FALLINGCLR);
__raw_writel(0x00000000, icdev->base + IC_TESTBIT);
wmb();
__raw_writel(icdev->pmdata[0], icdev->base + IC_CFG0SET);
__raw_writel(icdev->pmdata[1], icdev->base + IC_CFG1SET);
__raw_writel(icdev->pmdata[2], icdev->base + IC_CFG2SET);
__raw_writel(icdev->pmdata[3], icdev->base + IC_SRCSET);
__raw_writel(icdev->pmdata[4], icdev->base + IC_ASSIGNSET);
__raw_writel(icdev->pmdata[5], icdev->base + IC_WAKESET);
wmb();
__raw_writel(icdev->pmdata[6], icdev->base + IC_MASKSET);
wmb();
return 0;
}
static struct sysdev_class alchemy_ic_sysdev_class = {
.name = "ic",
.suspend = alchemy_ic_suspend,
.resume = alchemy_ic_resume,
};
static int __init alchemy_ic_sysdev_init(void)
{
struct alchemy_ic_sysdev *icdev;
unsigned long icbase[2] = { IC0_PHYS_ADDR, IC1_PHYS_ADDR };
int err, i;
err = sysdev_class_register(&alchemy_ic_sysdev_class);
if (err)
return err;
for (i = 0; i < 2; i++) {
icdev = kzalloc(sizeof(struct alchemy_ic_sysdev), GFP_KERNEL);
if (!icdev)
return -ENOMEM;
icdev->base = ioremap(icbase[i], 0x1000);
icdev->sysdev.id = i;
icdev->sysdev.cls = &alchemy_ic_sysdev_class;
err = sysdev_register(&icdev->sysdev);
if (err) {
kfree(icdev);
return err;
}
}
return 0;
}
device_initcall(alchemy_ic_sysdev_init);

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@ -36,9 +36,6 @@
#include <asm/uaccess.h>
#include <asm/mach-au1x00/au1000.h>
#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
#include <asm/mach-au1x00/au1xxx_dbdma.h>
#endif
#ifdef CONFIG_PM
@ -106,9 +103,6 @@ static void save_core_regs(void)
sleep_usb[1] = au_readl(0xb4020024); /* OTG_MUX */
#endif
/* Save interrupt controller state. */
save_au1xxx_intctl();
/* Clocks and PLLs. */
sleep_sys_clocks[0] = au_readl(SYS_FREQCTRL0);
sleep_sys_clocks[1] = au_readl(SYS_FREQCTRL1);
@ -132,10 +126,6 @@ static void save_core_regs(void)
sleep_static_memctlr[3][0] = au_readl(MEM_STCFG3);
sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3);
sleep_static_memctlr[3][2] = au_readl(MEM_STADDR3);
#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
au1xxx_dbdma_suspend();
#endif
}
static void restore_core_regs(void)
@ -199,12 +189,6 @@ static void restore_core_regs(void)
au_writel(sleep_uart0_linectl, UART0_ADDR + UART_LCR); au_sync();
au_writel(sleep_uart0_clkdiv, UART0_ADDR + UART_CLK); au_sync();
}
restore_au1xxx_intctl();
#if defined(CONFIG_SOC_AU1550) || defined(CONFIG_SOC_AU1200)
au1xxx_dbdma_resume();
#endif
}
void au_sleep(void)

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@ -27,8 +27,10 @@
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pm.h>
#include <asm/mach-au1x00/au1000.h>
#include <asm/mach-pb1x00/pb1000.h>
#include <asm/reboot.h>
#include <prom.h>
#include "../platform.h"
@ -38,8 +40,16 @@ const char *get_system_type(void)
return "Alchemy Pb1000";
}
void board_reset(void)
static void board_reset(char *c)
{
asm volatile ("jr %0" : : "r" (0xbfc00000));
}
static void board_power_off(void)
{
printk(KERN_ALERT "It's now safe to remove power\n");
while (1)
asm volatile (".set mips3 ; wait ; .set mips1");
}
void __init board_setup(void)
@ -177,6 +187,10 @@ void __init board_setup(void)
au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
break;
}
pm_power_off = board_power_off;
_machine_halt = board_power_off;
_machine_restart = board_reset;
}
static int __init pb1000_init_irq(void)

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@ -39,11 +39,6 @@ const char *get_system_type(void)
return "Alchemy Pb1100";
}
void board_reset(void)
{
bcsr_write(BCSR_SYSTEM, 0);
}
void __init board_setup(void)
{
volatile void __iomem *base = (volatile void __iomem *)0xac000000UL;

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@ -48,12 +48,6 @@ const char *get_system_type(void)
return "Alchemy Pb1200";
}
void board_reset(void)
{
bcsr_write(BCSR_RESETS, 0);
bcsr_write(BCSR_SYSTEM, 0);
}
void __init board_setup(void)
{
printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");

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@ -45,11 +45,6 @@ const char *get_system_type(void)
return "Alchemy Pb1500";
}
void board_reset(void)
{
bcsr_write(BCSR_SYSTEM, 0);
}
void __init board_setup(void)
{
u32 pin_func;

View File

@ -48,11 +48,6 @@ const char *get_system_type(void)
return "Alchemy Pb1550";
}
void board_reset(void)
{
bcsr_write(BCSR_SYSTEM, 0);
}
void __init board_setup(void)
{
u32 pin_func;

View File

@ -576,7 +576,6 @@ static int __init ar7_register_devices(void)
{
void __iomem *bootcr;
u32 val;
u16 chip_id;
int res;
res = ar7_register_uarts();
@ -635,18 +634,10 @@ static int __init ar7_register_devices(void)
val = readl(bootcr);
iounmap(bootcr);
if (val & AR7_WDT_HW_ENA) {
chip_id = ar7_chip_id();
switch (chip_id) {
case AR7_CHIP_7100:
case AR7_CHIP_7200:
ar7_wdt_res.start = AR7_REGS_WDT;
break;
case AR7_CHIP_7300:
if (ar7_has_high_vlynq())
ar7_wdt_res.start = UR8_REGS_WDT;
break;
default:
break;
}
else
ar7_wdt_res.start = AR7_REGS_WDT;
ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
res = platform_device_register(&ar7_wdt);
@ -656,4 +647,4 @@ static int __init ar7_register_devices(void)
return 0;
}
arch_initcall(ar7_register_devices);
device_initcall(ar7_register_devices);

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@ -91,7 +91,7 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
tmp = bcm_gpio_readl(reg);
if (dir == GPIO_DIR_IN)
if (dir == BCM63XX_GPIO_DIR_IN)
tmp &= ~mask;
else
tmp |= mask;
@ -103,14 +103,14 @@ static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
{
return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_IN);
return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
}
static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
unsigned gpio, int value)
{
bcm63xx_gpio_set(chip, gpio, value);
return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT);
return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
}

View File

@ -65,7 +65,11 @@ static void __init octeon_uart_set_common(struct plat_serial8250_port *p)
p->type = PORT_OCTEON;
p->iotype = UPIO_MEM;
p->regshift = 3; /* I/O addresses are every 8 bytes */
p->uartclk = mips_hpt_frequency;
if (octeon_is_simulation())
/* Make simulator output fast*/
p->uartclk = 115200 * 16;
else
p->uartclk = mips_hpt_frequency;
p->serial_in = octeon_serial_in;
p->serial_out = octeon_serial_out;
}

View File

@ -403,7 +403,6 @@ void __init prom_init(void)
const int coreid = cvmx_get_core_num();
int i;
int argc;
struct uart_port octeon_port;
#ifdef CONFIG_CAVIUM_RESERVE32
int64_t addr = -1;
#endif
@ -610,30 +609,6 @@ void __init prom_init(void)
_machine_restart = octeon_restart;
_machine_halt = octeon_halt;
memset(&octeon_port, 0, sizeof(octeon_port));
/*
* For early_serial_setup we don't set the port type or
* UPF_FIXED_TYPE.
*/
octeon_port.flags = ASYNC_SKIP_TEST | UPF_SHARE_IRQ;
octeon_port.iotype = UPIO_MEM;
/* I/O addresses are every 8 bytes */
octeon_port.regshift = 3;
/* Clock rate of the chip */
octeon_port.uartclk = mips_hpt_frequency;
octeon_port.fifosize = 64;
octeon_port.mapbase = 0x0001180000000800ull + (1024 * octeon_uart);
octeon_port.membase = cvmx_phys_to_ptr(octeon_port.mapbase);
octeon_port.serial_in = octeon_serial_in;
octeon_port.serial_out = octeon_serial_out;
#ifdef CONFIG_CAVIUM_OCTEON_2ND_KERNEL
octeon_port.line = 0;
#else
octeon_port.line = octeon_uart;
#endif
octeon_port.irq = 42 + octeon_uart;
early_serial_setup(&octeon_port);
octeon_user_io_init();
register_smp_ops(&octeon_smp_ops);
}
@ -727,7 +702,7 @@ int prom_putchar(char c)
} while ((lsrval & 0x20) == 0);
/* Write the byte */
cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c);
cvmx_write_csr(CVMX_MIO_UARTX_THR(octeon_uart), c & 0xffull);
return 1;
}

View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.30
# Wed Jun 24 14:08:59 2009
# Linux kernel version: 2.6.34-rc6
# Sat May 1 11:35:01 2010
#
CONFIG_MIPS=y
@ -11,11 +11,12 @@ CONFIG_MIPS=y
# CONFIG_MACH_ALCHEMY is not set
CONFIG_AR7=y
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_LASAT is not set
# CONFIG_LEMOTE_FULONG is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MIPS_MALTA is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_NEC_MARKEINS is not set
@ -26,6 +27,7 @@ CONFIG_AR7=y
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_POWERTV is not set
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
@ -46,6 +48,7 @@ CONFIG_AR7=y
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
CONFIG_LOONGSON_UART_BASE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
@ -63,10 +66,8 @@ CONFIG_CEVT_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_EARLY_PRINTK=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
# CONFIG_HOTPLUG_CPU is not set
# CONFIG_NO_IOPORT is not set
CONFIG_GENERIC_GPIO=y
# CONFIG_CPU_BIG_ENDIAN is not set
@ -81,7 +82,8 @@ CONFIG_MIPS_L1_CACHE_SHIFT=5
#
# CPU selection
#
# CONFIG_CPU_LOONGSON2 is not set
# CONFIG_CPU_LOONGSON2E is not set
# CONFIG_CPU_LOONGSON2F is not set
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
@ -103,6 +105,8 @@ CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPSR1=y
@ -124,6 +128,7 @@ CONFIG_CPU_HAS_PREFETCH=y
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
CONFIG_CPU_HAS_SYNC=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
@ -141,8 +146,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_TICK_ONESHOT=y
# CONFIG_NO_HZ is not set
@ -165,6 +169,7 @@ CONFIG_KEXEC=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
#
# General setup
@ -174,6 +179,14 @@ CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
# CONFIG_KERNEL_GZIP is not set
# CONFIG_KERNEL_BZIP2 is not set
CONFIG_KERNEL_LZMA=y
# CONFIG_KERNEL_LZO is not set
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
@ -186,14 +199,12 @@ CONFIG_BSD_PROCESS_ACCT=y
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TINY_RCU=y
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_GROUP_SCHED is not set
# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
@ -204,6 +215,7 @@ CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
CONFIG_RD_LZMA=y
# CONFIG_RD_LZO is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
@ -225,19 +237,22 @@ CONFIG_SHMEM=y
CONFIG_AIO=y
#
# Performance Counters
# Kernel Performance Events And Counters
#
# CONFIG_VM_EVENT_COUNTERS is not set
CONFIG_STRIP_ASM_SYMS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
# CONFIG_SLOW_WORK is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
@ -248,7 +263,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
@ -256,14 +271,41 @@ CONFIG_BLOCK=y
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
CONFIG_IOSCHED_DEADLINE=y
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_DEFAULT_AS is not set
CONFIG_DEFAULT_DEADLINE=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="deadline"
# CONFIG_INLINE_SPIN_TRYLOCK is not set
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK is not set
# CONFIG_INLINE_SPIN_LOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
CONFIG_INLINE_SPIN_UNLOCK=y
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_READ_TRYLOCK is not set
# CONFIG_INLINE_READ_LOCK is not set
# CONFIG_INLINE_READ_LOCK_BH is not set
# CONFIG_INLINE_READ_LOCK_IRQ is not set
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
CONFIG_INLINE_READ_UNLOCK=y
# CONFIG_INLINE_READ_UNLOCK_BH is not set
CONFIG_INLINE_READ_UNLOCK_IRQ=y
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_WRITE_TRYLOCK is not set
# CONFIG_INLINE_WRITE_LOCK is not set
# CONFIG_INLINE_WRITE_LOCK_BH is not set
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
CONFIG_INLINE_WRITE_UNLOCK=y
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
# CONFIG_FREEZER is not set
#
@ -293,7 +335,6 @@ CONFIG_NET=y
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
@ -377,6 +418,7 @@ CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NETFILTER_XTABLES=m
# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
# CONFIG_NETFILTER_XT_TARGET_CT is not set
# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
# CONFIG_NETFILTER_XT_TARGET_HL is not set
# CONFIG_NETFILTER_XT_TARGET_LED is not set
@ -458,6 +500,7 @@ CONFIG_IP_NF_RAW=m
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
CONFIG_ATM=m
# CONFIG_ATM_CLIP is not set
@ -466,6 +509,7 @@ CONFIG_ATM_BR2684=m
CONFIG_ATM_BR2684_IPFILTER=y
CONFIG_STP=y
CONFIG_BRIDGE=y
CONFIG_BRIDGE_IGMP_SNOOPING=y
# CONFIG_NET_DSA is not set
CONFIG_VLAN_8021Q=y
# CONFIG_VLAN_8021Q_GVRP is not set
@ -541,20 +585,19 @@ CONFIG_HAMRADIO=y
# CONFIG_AF_RXRPC is not set
CONFIG_FIB_RULES=y
CONFIG_WIRELESS=y
CONFIG_WEXT_CORE=y
CONFIG_WEXT_PROC=y
CONFIG_CFG80211=m
# CONFIG_NL80211_TESTMODE is not set
# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
# CONFIG_CFG80211_REG_DEBUG is not set
CONFIG_CFG80211_DEFAULT_PS=y
# CONFIG_CFG80211_DEBUGFS is not set
# CONFIG_WIRELESS_OLD_REGULATORY is not set
CONFIG_WIRELESS_EXT=y
# CONFIG_CFG80211_INTERNAL_REGDB is not set
CONFIG_CFG80211_WEXT=y
CONFIG_WIRELESS_EXT_SYSFS=y
# CONFIG_LIB80211 is not set
CONFIG_MAC80211=m
CONFIG_MAC80211_DEFAULT_PS=y
CONFIG_MAC80211_DEFAULT_PS_VALUE=1
#
# Rate control algorithm selection
#
CONFIG_MAC80211_RC_PID=y
CONFIG_MAC80211_RC_MINSTREL=y
CONFIG_MAC80211_RC_DEFAULT_PID=y
@ -576,6 +619,7 @@ CONFIG_MAC80211_RC_DEFAULT="pid"
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_DEVTMPFS is not set
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
@ -585,9 +629,9 @@ CONFIG_EXTRA_FIRMWARE=""
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_CONCAT is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set
# CONFIG_MTD_AR7_PARTS is not set
@ -636,6 +680,7 @@ CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_COMPLEX_MAPPINGS=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_MTD_PHYSMAP_COMPAT is not set
# CONFIG_MTD_GPIO_ADDR is not set
# CONFIG_MTD_PLATRAM is not set
#
@ -668,6 +713,10 @@ CONFIG_MTD_PHYSMAP=y
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
#
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
@ -687,6 +736,7 @@ CONFIG_HAVE_IDE=y
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
@ -727,6 +777,7 @@ CONFIG_MII=y
# CONFIG_SMC91X is not set
# CONFIG_DM9000 is not set
# CONFIG_ETHOC is not set
# CONFIG_SMSC911X is not set
# CONFIG_DNET is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
@ -737,23 +788,21 @@ CONFIG_MII=y
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
# CONFIG_KS8842 is not set
# CONFIG_KS8851_MLL is not set
CONFIG_CPMAC=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
#
# Wireless LAN
#
# CONFIG_WLAN_PRE80211 is not set
CONFIG_WLAN_80211=y
# CONFIG_LIBERTAS is not set
CONFIG_WLAN=y
# CONFIG_LIBERTAS_THINFIRM is not set
# CONFIG_MAC80211_HWSIM is not set
# CONFIG_P54_COMMON is not set
# CONFIG_HOSTAP is not set
# CONFIG_ATH_COMMON is not set
# CONFIG_B43 is not set
# CONFIG_B43LEGACY is not set
# CONFIG_HOSTAP is not set
# CONFIG_LIBERTAS is not set
# CONFIG_P54_COMMON is not set
# CONFIG_RT2X00 is not set
# CONFIG_WL12XX is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
@ -813,6 +862,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_TIMBERDALE is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_LEGACY_PTYS is not set
@ -824,11 +874,39 @@ CONFIG_HW_RANDOM=y
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
#
# PPS support
#
# CONFIG_PPS is not set
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
#
# Memory mapped GPIO expanders:
#
# CONFIG_GPIO_IT8761E is not set
#
# I2C GPIO expanders:
#
#
# PCI GPIO expanders:
#
#
# SPI GPIO expanders:
#
#
# AC97 GPIO expanders:
#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
@ -842,13 +920,7 @@ CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
CONFIG_SSB=y
# CONFIG_SSB_SILENT is not set
# CONFIG_SSB_DEBUG is not set
CONFIG_SSB_SERIAL=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_EMBEDDED=y
CONFIG_SSB_DRIVER_EXTIF=y
# CONFIG_SSB is not set
#
# Multifunction device drivers
@ -882,15 +954,18 @@ CONFIG_LEDS_CLASS=y
#
# LED drivers
#
# CONFIG_LEDS_GPIO is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_GPIO_PLATFORM=y
# CONFIG_LEDS_LT3593 is not set
CONFIG_LEDS_TRIGGERS=y
#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
# CONFIG_LEDS_TRIGGER_GPIO is not set
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
#
@ -921,6 +996,7 @@ CONFIG_VLYNQ=y
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
# CONFIG_DNOTIFY is not set
@ -984,6 +1060,7 @@ CONFIG_JFFS2_RTIME=y
CONFIG_JFFS2_CMODE_PRIORITY=y
# CONFIG_JFFS2_CMODE_SIZE is not set
# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
# CONFIG_LOGFS is not set
# CONFIG_CRAMFS is not set
CONFIG_SQUASHFS=y
# CONFIG_SQUASHFS_EMBEDDED is not set
@ -996,11 +1073,11 @@ CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
# CONFIG_SMB_FS is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
@ -1039,21 +1116,29 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_STRIP_ASM_SYMS=y
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_LKDTM is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
# CONFIG_DYNAMIC_DEBUG is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_EARLY_PRINTK=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_SPINLOCK_TEST is not set
#
# Security options
@ -1061,13 +1146,16 @@ CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
# CONFIG_DEFAULT_SECURITY_SMACK is not set
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
# CONFIG_CRYPTO_FIPS is not set
CONFIG_CRYPTO_ALGAPI=m
CONFIG_CRYPTO_ALGAPI2=m
CONFIG_CRYPTO_AEAD2=m
@ -1108,11 +1196,13 @@ CONFIG_CRYPTO_ECB=m
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set
#
# Digest
#
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_MD4 is not set
# CONFIG_CRYPTO_MD5 is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -190,8 +190,6 @@ extern unsigned long au1xxx_calc_clock(void);
/* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */
void au1xxx_save_and_sleep(void);
void au_sleep(void);
void save_au1xxx_intctl(void);
void restore_au1xxx_intctl(void);
/* SOC Interrupt numbers */
@ -835,6 +833,38 @@ enum soc_au1200_ints {
#define MEM_STNAND_DATA 0x20
#endif
/* Interrupt Controller register offsets */
#define IC_CFG0RD 0x40
#define IC_CFG0SET 0x40
#define IC_CFG0CLR 0x44
#define IC_CFG1RD 0x48
#define IC_CFG1SET 0x48
#define IC_CFG1CLR 0x4C
#define IC_CFG2RD 0x50
#define IC_CFG2SET 0x50
#define IC_CFG2CLR 0x54
#define IC_REQ0INT 0x54
#define IC_SRCRD 0x58
#define IC_SRCSET 0x58
#define IC_SRCCLR 0x5C
#define IC_REQ1INT 0x5C
#define IC_ASSIGNRD 0x60
#define IC_ASSIGNSET 0x60
#define IC_ASSIGNCLR 0x64
#define IC_WAKERD 0x68
#define IC_WAKESET 0x68
#define IC_WAKECLR 0x6C
#define IC_MASKRD 0x70
#define IC_MASKSET 0x70
#define IC_MASKCLR 0x74
#define IC_RISINGRD 0x78
#define IC_RISINGCLR 0x78
#define IC_FALLINGRD 0x7C
#define IC_FALLINGCLR 0x7C
#define IC_TESTBIT 0x80
/* Interrupt Controller 0 */
#define IC0_CFG0RD 0xB0400040
#define IC0_CFG0SET 0xB0400040

View File

@ -358,10 +358,6 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr);
u32 au1xxx_ddma_add_device(dbdev_tab_t *dev);
extern void au1xxx_ddma_del_device(u32 devid);
void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp);
#ifdef CONFIG_PM
void au1xxx_dbdma_suspend(void);
void au1xxx_dbdma_resume(void);
#endif
/*
* Flags for the put_source/put_dest functions.

View File

@ -20,7 +20,7 @@ static inline unsigned long bcm63xx_gpio_count(void)
}
}
#define GPIO_DIR_OUT 0x0
#define GPIO_DIR_IN 0x1
#define BCM63XX_GPIO_DIR_OUT 0x0
#define BCM63XX_GPIO_DIR_IN 0x1
#endif /* !BCM63XX_GPIO_H */

View File

@ -52,6 +52,8 @@
#define cpu_has_tx39_cache 0
#define cpu_has_userlocal 0
#define cpu_has_vce 0
#define cpu_has_veic 0
#define cpu_has_vint 0
#define cpu_has_vtag_icache 0
#define cpu_has_watch 1

View File

@ -0,0 +1,35 @@
/*
* STLS2F GPIO Support
*
* Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com>
* Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __STLS2F_GPIO_H
#define __STLS2F_GPIO_H
#include <asm-generic/gpio.h>
extern void gpio_set_value(unsigned gpio, int value);
extern int gpio_get_value(unsigned gpio);
extern int gpio_cansleep(unsigned gpio);
/* The chip can do interrupt
* but it has not been tested and doc not clear
*/
static inline int gpio_to_irq(int gpio)
{
return -EINVAL;
}
static inline int irq_to_gpio(int gpio)
{
return -EINVAL;
}
#endif /* __STLS2F_GPIO_H */

View File

@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p);
#ifdef CONFIG_CPU_HAS_PREFETCH
#define ARCH_HAS_PREFETCH
#define prefetch(x) __builtin_prefetch((x), 0, 1)
static inline void prefetch(const void *addr)
{
__asm__ __volatile__(
" .set mips4 \n"
" pref %0, (%1) \n"
" .set mips0 \n"
:
: "i" (Pref_Load), "r" (addr));
}
#define ARCH_HAS_PREFETCHW
#define prefetchw(x) __builtin_prefetch((x), 1, 1)
#endif

View File

@ -125,6 +125,30 @@ static int __init wait_disable(char *s)
__setup("nowait", wait_disable);
static int __cpuinitdata mips_fpu_disabled;
static int __init fpu_disable(char *s)
{
cpu_data[0].options &= ~MIPS_CPU_FPU;
mips_fpu_disabled = 1;
return 1;
}
__setup("nofpu", fpu_disable);
int __cpuinitdata mips_dsp_disabled;
static int __init dsp_disable(char *s)
{
cpu_data[0].ases &= ~MIPS_ASE_DSP;
mips_dsp_disabled = 1;
return 1;
}
__setup("nodsp", dsp_disable);
void __init check_wait(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
@ -982,6 +1006,12 @@ __cpuinit void cpu_probe(void)
*/
BUG_ON(current_cpu_type() != c->cputype);
if (mips_fpu_disabled)
c->options &= ~MIPS_CPU_FPU;
if (mips_dsp_disabled)
c->ases &= ~MIPS_ASE_DSP;
if (c->options & MIPS_CPU_FPU) {
c->fpu_id = cpu_get_fpu_id();

View File

@ -65,7 +65,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy,
return -ENODEV;
cpus_allowed = current->cpus_allowed;
set_cpus_allowed(current, cpumask_of_cpu(cpu));
set_cpus_allowed_ptr(current, cpumask_of(cpu));
if (cpufreq_frequency_table_target
(policy, &loongson2_clockmod_table[0], target_freq, relation,
@ -91,7 +91,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy,
/* notifiers */
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
set_cpus_allowed(current, cpus_allowed);
set_cpus_allowed_ptr(current, &cpus_allowed);
/* setting the cpu frequency */
clk_set_rate(cpuclk, freq);

View File

@ -100,10 +100,10 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len,
if (test_ti_thread_flag(ti, TIF_FPUBOUND) &&
cpus_intersects(new_mask, mt_fpu_cpumask)) {
cpus_and(effective_mask, new_mask, mt_fpu_cpumask);
retval = set_cpus_allowed(p, effective_mask);
retval = set_cpus_allowed_ptr(p, &effective_mask);
} else {
clear_ti_thread_flag(ti, TIF_FPUBOUND);
retval = set_cpus_allowed(p, new_mask);
retval = set_cpus_allowed_ptr(p, &new_mask);
}
out_unlock:

View File

@ -569,27 +569,6 @@ void __init setup_arch(char **cmdline_p)
plat_smp_setup();
}
static int __init fpu_disable(char *s)
{
int i;
for (i = 0; i < NR_CPUS; i++)
cpu_data[i].options &= ~MIPS_CPU_FPU;
return 1;
}
__setup("nofpu", fpu_disable);
static int __init dsp_disable(char *s)
{
cpu_data[0].ases &= ~MIPS_ASE_DSP;
return 1;
}
__setup("nodsp", dsp_disable);
unsigned long kernelsp[NR_CPUS];
unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3;

View File

@ -867,7 +867,7 @@ static void mt_ase_fp_affinity(void)
= current->cpus_allowed;
cpus_and(tmask, current->cpus_allowed,
mt_fpu_cpumask);
set_cpus_allowed(current, tmask);
set_cpus_allowed_ptr(current, &tmask);
set_thread_flag(TIF_FPUBOUND);
}
}

View File

@ -4,6 +4,7 @@
obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \
pci.o bonito-irq.o mem.o machtype.o platform.o
obj-$(CONFIG_GENERIC_GPIO) += gpio.o
#
# Serial port support

View File

@ -0,0 +1,139 @@
/*
* STLS2F GPIO Support
*
* Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com>
* Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/err.h>
#include <asm/types.h>
#include <loongson.h>
#include <linux/gpio.h>
#define STLS2F_N_GPIO 4
#define STLS2F_GPIO_IN_OFFSET 16
static DEFINE_SPINLOCK(gpio_lock);
int gpio_get_value(unsigned gpio)
{
u32 val;
u32 mask;
if (gpio >= STLS2F_N_GPIO)
return __gpio_get_value(gpio);
mask = 1 << (gpio + STLS2F_GPIO_IN_OFFSET);
spin_lock(&gpio_lock);
val = LOONGSON_GPIODATA;
spin_unlock(&gpio_lock);
return ((val & mask) != 0);
}
EXPORT_SYMBOL(gpio_get_value);
void gpio_set_value(unsigned gpio, int state)
{
u32 val;
u32 mask;
if (gpio >= STLS2F_N_GPIO) {
__gpio_set_value(gpio, state);
return ;
}
mask = 1 << gpio;
spin_lock(&gpio_lock);
val = LOONGSON_GPIODATA;
if (state)
val |= mask;
else
val &= (~mask);
LOONGSON_GPIODATA = val;
spin_unlock(&gpio_lock);
}
EXPORT_SYMBOL(gpio_set_value);
int gpio_cansleep(unsigned gpio)
{
if (gpio < STLS2F_N_GPIO)
return 0;
else
return __gpio_cansleep(gpio);
}
EXPORT_SYMBOL(gpio_cansleep);
static int ls2f_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
{
u32 temp;
u32 mask;
if (gpio >= STLS2F_N_GPIO)
return -EINVAL;
spin_lock(&gpio_lock);
mask = 1 << gpio;
temp = LOONGSON_GPIOIE;
temp |= mask;
LOONGSON_GPIOIE = temp;
spin_unlock(&gpio_lock);
return 0;
}
static int ls2f_gpio_direction_output(struct gpio_chip *chip,
unsigned gpio, int level)
{
u32 temp;
u32 mask;
if (gpio >= STLS2F_N_GPIO)
return -EINVAL;
gpio_set_value(gpio, level);
spin_lock(&gpio_lock);
mask = 1 << gpio;
temp = LOONGSON_GPIOIE;
temp &= (~mask);
LOONGSON_GPIOIE = temp;
spin_unlock(&gpio_lock);
return 0;
}
static int ls2f_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
{
return gpio_get_value(gpio);
}
static void ls2f_gpio_set_value(struct gpio_chip *chip,
unsigned gpio, int value)
{
gpio_set_value(gpio, value);
}
static struct gpio_chip ls2f_chip = {
.label = "ls2f",
.direction_input = ls2f_gpio_direction_input,
.get = ls2f_gpio_get_value,
.direction_output = ls2f_gpio_direction_output,
.set = ls2f_gpio_set_value,
.base = 0,
.ngpio = STLS2F_N_GPIO,
};
static int __init ls2f_gpio_setup(void)
{
return gpiochip_add(&ls2f_chip);
}
arch_initcall(ls2f_gpio_setup);

View File

@ -354,7 +354,8 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
if (MIPSInst_RD(ir) == FPCREG_CSR) {
value = ctx->fcr31;
value = (value & ~0x3) | mips_rm[value & 0x3];
value = (value & ~FPU_CSR_RM) |
mips_rm[modeindex(value)];
#ifdef CSRTRACE
printk("%p gpr[%d]<-csr=%08x\n",
(void *) (xcp->cp0_epc),
@ -907,7 +908,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
ieee754sp fs;
SPFROMREG(fs, MIPSInst_FS(ir));
ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
rv.w = ieee754sp_tint(fs);
ieee754_csr.rm = oldrm;
rfmt = w_fmt;
@ -933,7 +934,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
ieee754sp fs;
SPFROMREG(fs, MIPSInst_FS(ir));
ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
rv.l = ieee754sp_tlong(fs);
ieee754_csr.rm = oldrm;
rfmt = l_fmt;
@ -1081,7 +1082,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
ieee754dp fs;
DPFROMREG(fs, MIPSInst_FS(ir));
ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
rv.w = ieee754dp_tint(fs);
ieee754_csr.rm = oldrm;
rfmt = w_fmt;
@ -1107,7 +1108,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
ieee754dp fs;
DPFROMREG(fs, MIPSInst_FS(ir));
ieee754_csr.rm = ieee_rm[MIPSInst_FUNC(ir) & 0x3];
ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
rv.l = ieee754dp_tlong(fs);
ieee754_csr.rm = oldrm;
rfmt = l_fmt;

View File

@ -8,7 +8,6 @@
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/oprofile.h>
@ -17,24 +16,18 @@
#include <loongson.h> /* LOONGSON2_PERFCNT_IRQ */
#include "op_impl.h"
/*
* a patch should be sent to oprofile with the loongson-specific support.
* otherwise, the oprofile tool will not recognize this and complain about
* "cpu_type 'unset' is not valid".
*/
#define LOONGSON2_CPU_TYPE "mips/loongson2"
#define LOONGSON2_COUNTER1_EVENT(event) ((event & 0x0f) << 5)
#define LOONGSON2_COUNTER2_EVENT(event) ((event & 0x0f) << 9)
#define LOONGSON2_PERFCNT_EXL (1UL << 0)
#define LOONGSON2_PERFCNT_KERNEL (1UL << 1)
#define LOONGSON2_PERFCNT_SUPERVISOR (1UL << 2)
#define LOONGSON2_PERFCNT_USER (1UL << 3)
#define LOONGSON2_PERFCNT_INT_EN (1UL << 4)
#define LOONGSON2_PERFCNT_OVERFLOW (1ULL << 31)
/* Loongson2 performance counter register */
#define LOONGSON2_PERFCTRL_EXL (1UL << 0)
#define LOONGSON2_PERFCTRL_KERNEL (1UL << 1)
#define LOONGSON2_PERFCTRL_SUPERVISOR (1UL << 2)
#define LOONGSON2_PERFCTRL_USER (1UL << 3)
#define LOONGSON2_PERFCTRL_ENABLE (1UL << 4)
#define LOONGSON2_PERFCTRL_EVENT(idx, event) \
(((event) & 0x0f) << ((idx) ? 9 : 5))
#define read_c0_perfctrl() __read_64bit_c0_register($24, 0)
#define write_c0_perfctrl(val) __write_64bit_c0_register($24, 0, val)
#define read_c0_perfcnt() __read_64bit_c0_register($25, 0)
@ -49,7 +42,6 @@ static struct loongson2_register_config {
static char *oprofid = "LoongsonPerf";
static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id);
/* Compute all of the registers in preparation for enabling profiling. */
static void loongson2_reg_setup(struct op_counter_config *cfg)
{
@ -57,41 +49,38 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)
reg.reset_counter1 = 0;
reg.reset_counter2 = 0;
/* Compute the performance counter ctrl word. */
/* For now count kernel and user mode */
/*
* Compute the performance counter ctrl word.
* For now, count kernel and user mode.
*/
if (cfg[0].enabled) {
ctrl |= LOONGSON2_COUNTER1_EVENT(cfg[0].event);
ctrl |= LOONGSON2_PERFCTRL_EVENT(0, cfg[0].event);
reg.reset_counter1 = 0x80000000ULL - cfg[0].count;
}
if (cfg[1].enabled) {
ctrl |= LOONGSON2_COUNTER2_EVENT(cfg[1].event);
reg.reset_counter2 = (0x80000000ULL - cfg[1].count);
ctrl |= LOONGSON2_PERFCTRL_EVENT(1, cfg[1].event);
reg.reset_counter2 = 0x80000000ULL - cfg[1].count;
}
if (cfg[0].enabled || cfg[1].enabled) {
ctrl |= LOONGSON2_PERFCNT_EXL | LOONGSON2_PERFCNT_INT_EN;
ctrl |= LOONGSON2_PERFCTRL_EXL | LOONGSON2_PERFCTRL_ENABLE;
if (cfg[0].kernel || cfg[1].kernel)
ctrl |= LOONGSON2_PERFCNT_KERNEL;
ctrl |= LOONGSON2_PERFCTRL_KERNEL;
if (cfg[0].user || cfg[1].user)
ctrl |= LOONGSON2_PERFCNT_USER;
ctrl |= LOONGSON2_PERFCTRL_USER;
}
reg.ctrl = ctrl;
reg.cnt1_enabled = cfg[0].enabled;
reg.cnt2_enabled = cfg[1].enabled;
}
/* Program all of the registers in preparation for enabling profiling. */
static void loongson2_cpu_setup(void *args)
{
uint64_t perfcount;
perfcount = (reg.reset_counter2 << 32) | reg.reset_counter1;
write_c0_perfcnt(perfcount);
write_c0_perfcnt((reg.reset_counter2 << 32) | reg.reset_counter1);
}
static void loongson2_cpu_start(void *args)
@ -114,15 +103,8 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
struct pt_regs *regs = get_irq_regs();
int enabled;
/*
* LOONGSON2 defines two 32-bit performance counters.
* To avoid a race updating the registers we need to stop the counters
* while we're messing with
* them ...
*/
/* Check whether the irq belongs to me */
enabled = read_c0_perfctrl() & LOONGSON2_PERFCNT_INT_EN;
enabled = read_c0_perfctrl() & LOONGSON2_PERFCTRL_ENABLE;
if (!enabled)
return IRQ_NONE;
enabled = reg.cnt1_enabled | reg.cnt2_enabled;

View File

@ -22,7 +22,9 @@
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* NON_DVR_CAPABLE CALLIOPE RESOURCES
@ -32,432 +34,234 @@ struct resource non_dvr_calliope_resources[] __initdata =
/*
* VIDEO / LX1
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x24200000 - 1, /*2MiB */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /*8KiB block ST231a monitor */
.start = 0x24200000,
.end = 0x24202000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x24202000,
.end = 0x26700000 - 1, /*~36.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_MEM,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~36.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26700000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
{
.name = "AVMEMPartition0",
.start = 0x00000000,
.end = 0x00600000 - 1, /* 6 MB total */
.flags = IORESOURCE_MEM,
},
/* 6MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* DOCSIS Subsystem
*/
{
.name = "Docsis",
.start = 0x22000000,
.end = 0x22700000 - 1,
.flags = IORESOURCE_MEM,
},
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x27500000, 0x27c00000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
{
.name = "GraphicsHeap",
.start = 0x22700000,
.end = 0x23500000 - 1, /* 14 MB total */
.flags = IORESOURCE_MEM,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x26700000, 0x26700000+(14*1048576)-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
{
.name = "MulticomSHM",
.start = 0x23700000,
.end = 0x23720000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* AVFS: player HAL memory
*
*
*/
{
.name = "AvfsDmaMem",
.start = 0x00000000,
.end = 0x002c4c00 - 1, /* 945K * 3 for playback */
.flags = IORESOURCE_MEM,
},
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
{
.name = "SmartCardInfo",
.start = 0x00000000,
.end = 0x2800 - 1,
.flags = IORESOURCE_MEM,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
{
.name = "NandFlash",
.start = NAND_FLASH_BASE,
.end = NAND_FLASH_BASE + 0x400 - 1,
.flags = IORESOURCE_IO,
},
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Synopsys GMAC Memory Region
*/
{
.name = "GMAC",
.start = 0x00000000,
.end = 0x00010000 - 1,
.flags = IORESOURCE_MEM,
},
/* 64KiB */
PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
struct resource non_dvr_vz_calliope_resources[] __initdata =
{
/*
* VIDEO / LX1
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x24200000 - 1, /*2 Meg */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /* 8k block ST231a monitor */
.start = 0x24200000,
.end = 0x24202000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x22202000,
.end = 0x22C20B85 - 1, /* 10.12 Meg */
.flags = IORESOURCE_MEM,
},
/*
* Sysaudio Driver
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/*
* STAVEM driver/STAPI
*/
{
.name = "AVMEMPartition0",
.start = 0x20300000,
.end = 0x20620000-1, /*3.125 MB total */
.flags = IORESOURCE_MEM,
},
/*
* GHW HAL Driver
*/
{
.name = "GraphicsHeap",
.start = 0x20100000,
.end = 0x20300000 - 1,
.flags = IORESOURCE_MEM,
},
/*
* multi com buffer area
*/
{
.name = "MulticomSHM",
.start = 0x23900000,
.end = 0x23920000 - 1,
.flags = IORESOURCE_MEM,
},
/*
* DMA Ring buffer
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/*
* Display bins buffer for unit0
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF,
.flags = IORESOURCE_MEM,
},
/*
* PMEM
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/*
* Smartcard
*/
{
.name = "SmartCardInfo",
.start = 0x00000000,
.end = 0x2800 - 1,
.flags = IORESOURCE_MEM,
},
/*
* NAND Flash
*/
{
.name = "NandFlash",
.start = NAND_FLASH_BASE,
.end = NAND_FLASH_BASE+0x400 - 1,
.flags = IORESOURCE_IO,
},
/*
* Synopsys GMAC Memory Region
*/
{
.name = "GMAC",
.start = 0x00000000,
.end = 0x00010000 - 1,
.flags = IORESOURCE_MEM,
},
/*
* Add other resources here
*/
{ },
};
struct resource non_dvr_vze_calliope_resources[] __initdata =
{
/*
* VIDEO / LX1
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x22000000,
.end = 0x22200000 - 1, /*2 Meg */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /* 8k block ST231a monitor */
.start = 0x22200000,
.end = 0x22202000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x22202000,
.end = 0x22C20B85 - 1, /* 10.12 Meg */
.flags = IORESOURCE_MEM,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x22000000, 0x22200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x22200000, 0x22202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (10.12MiB) */
PREALLOC_NORMAL("MediaMemory1", 0x22202000, 0x22C20B85-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (16KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (16KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
{
.name = "AVMEMPartition0",
.start = 0x20396000,
.end = 0x206B6000 - 1, /* 3.125 MB total */
.flags = IORESOURCE_MEM,
},
/* 3.125MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x20396000, 0x206B6000-1,
IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
{
.name = "GraphicsHeap",
.start = 0x20100000,
.end = 0x20396000 - 1,
.flags = IORESOURCE_MEM,
},
/* PowerTV Graphics Heap (2.59MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x20100000, 0x20396000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
{
.name = "MulticomSHM",
.start = 0x206B6000,
.end = 0x206D6000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x206B6000, 0x206D6000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer
* DMA Ring buffer (don't need recording buffers)
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF,
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
{
.name = "SmartCardInfo",
.start = 0x00000000,
.end = 0x2800 - 1,
.flags = IORESOURCE_MEM,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
{
.name = "NandFlash",
.start = NAND_FLASH_BASE,
.end = NAND_FLASH_BASE+0x400 - 1,
.flags = IORESOURCE_MEM,
},
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Synopsys GMAC Memory Region
*/
{
.name = "GMAC",
.start = 0x00000000,
.end = 0x00010000 - 1,
.flags = IORESOURCE_MEM,
},
/* 64KiB */
PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
struct resource non_dvr_vzf_calliope_resources[] __initdata =
@ -465,156 +269,117 @@ struct resource non_dvr_vzf_calliope_resources[] __initdata =
/*
* VIDEO / LX1
*/
{
.name = "ST231aImage", /*Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x24200000 - 1, /*2MiB */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /*8KiB block ST231a monitor */
.start = 0x24200000,
.end = 0x24202000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x24202000,
/* ~19.4 (21.5MiB - (2MiB + 8KiB)) */
.end = 0x25580000 - 1,
.flags = IORESOURCE_MEM,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~19.4 (21.5MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x25580000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
{
.name = "AVMEMPartition0",
.start = 0x00000000,
.end = 0x00480000 - 1, /* 4.5 MB total */
.flags = IORESOURCE_MEM,
},
/* 4.5MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00480000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* GHW HAL Driver
*/
{
.name = "GraphicsHeap",
.start = 0x22700000,
.end = 0x23500000 - 1, /* 14 MB total */
.flags = IORESOURCE_MEM,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x25600000, 0x25600000+(14*1048576)-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
{
.name = "MulticomSHM",
.start = 0x23700000,
.end = 0x23720000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x23700000, 0x23720000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer (don't need recording buffers)
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit1
*/
{
.name = "DisplayBins1",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* AVFS: player HAL memory
*
*
*/
{
.name = "AvfsDmaMem",
.start = 0x00000000,
.end = 0x002c4c00 - 1, /* 945K * 3 for playback */
.flags = IORESOURCE_MEM,
},
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
{
.name = "SmartCardInfo",
.start = 0x00000000,
.end = 0x2800 - 1,
.flags = IORESOURCE_MEM,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
{
.name = "NandFlash",
.start = NAND_FLASH_BASE,
.end = NAND_FLASH_BASE + 0x400 - 1,
.flags = IORESOURCE_MEM,
},
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Synopsys GMAC Memory Region
*/
{
.name = "GMAC",
.start = 0x00000000,
.end = 0x00010000 - 1,
.flags = IORESOURCE_MEM,
},
/* 64KiB */
PREALLOC_NORMAL("GMAC", 0x00000000, 0x00010000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

View File

@ -22,7 +22,9 @@
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* DVR_CAPABLE CRONUS RESOURCES
@ -30,305 +32,161 @@
struct resource dvr_cronus_resources[] __initdata =
{
/*
*
* VIDEO1 / LX1
*
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x241FFFFF, /* 2MiB */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231a monitor */
.start = 0x24200000,
.end = 0x24201FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x24202000,
.end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_MEM,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1,
IORESOURCE_MEM)
/*
*
* VIDEO2 / LX2
*
*/
{
.name = "ST231bImage", /* Delta-Mu 2 image and ram */
.start = 0x60000000,
.end = 0x601FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231bMonitor", /* 8KiB block ST231b monitor */
.start = 0x60200000,
.end = 0x60201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory2",
.start = 0x60202000,
.end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/* Delta-Mu 2 image (2MiB) */
PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 monitor (8KiB) */
PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1,
IORESOURCE_MEM)
/*
*
* Sysaudio Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* DSP_Image_Buff - DSP code and data images (1MB)
* ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
* ADSC_AUX_Buff - ADSC AUX buffer (16KB)
* ADSC_Main_Buff - ADSC Main buffer (16KB)
*
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* STAVEM driver/STAPI
*
* This driver requires:
*
* Arbitrary Based Buffers:
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*
*/
{
.name = "AVMEMPartition0",
.start = 0x63580000,
.end = 0x64180000 - 1, /* 12 MB total */
.flags = IORESOURCE_IO,
},
/* 12MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1,
IORESOURCE_MEM)
/*
*
* DOCSIS Subsystem
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "Docsis",
.start = 0x62000000,
.end = 0x62700000 - 1, /* 7 MB total */
.flags = IORESOURCE_IO,
},
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM)
/*
*
* GHW HAL Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* GraphicsHeap - PowerTV Graphics Heap
*
*/
{
.name = "GraphicsHeap",
.start = 0x62700000,
.end = 0x63500000 - 1, /* 14 MB total */
.flags = IORESOURCE_IO,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1,
IORESOURCE_MEM)
/*
*
* multi com buffer area
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "MulticomSHM",
.start = 0x26000000,
.end = 0x26020000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1,
IORESOURCE_MEM)
/*
*
* DMA Ring buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x00280000 - 1,
.flags = IORESOURCE_MEM,
},
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x002EA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer for unit0
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit0
*
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit1
*
* Display bins buffer for unit1
*/
{
.name = "DisplayBins1",
.start = 0x64AD4000,
.end = 0x64AD5000 - 1, /* 4 KB total */
.flags = IORESOURCE_IO,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
*
* ITFS
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "ITFS",
.start = 0x64180000,
/* 815,104 bytes each for 2 ITFS partitions. */
.end = 0x6430DFFF,
.flags = IORESOURCE_IO,
},
/* 815,104 bytes each for 2 ITFS partitions. */
PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1, IORESOURCE_MEM)
/*
*
* AVFS
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "AvfsDmaMem",
.start = 0x6430E000,
/* (945K * 8) = (128K *3) 5 playbacks / 3 server */
.end = 0x64AD0000 - 1,
.flags = IORESOURCE_IO,
},
{
.name = "AvfsFileSys",
.start = 0x64AD0000,
.end = 0x64AD1000 - 1, /* 4K */
.flags = IORESOURCE_IO,
},
/* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1,
IORESOURCE_MEM)
/* 4KiB */
PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
*
* PMEM
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Persistent memory for diagnostics.
*
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Smartcard
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Read and write buffers for Internal/External cards
*
*/
{
.name = "SmartCardInfo",
.start = 0x64AD1000,
.end = 0x64AD3800 - 1,
.flags = IORESOURCE_IO,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
IORESOURCE_MEM)
/*
*
* KAVNET
* NP Reset Vector - must be of the form xxCxxxxx
* NP Image - must be video bank 1
* NP IPC - must be video bank 2
*/
{
.name = "NP_Reset_Vector",
.start = 0x27c00000,
.end = 0x27c01000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_Image",
.start = 0x27020000,
.end = 0x27060000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_IPC",
.start = 0x63500000,
.end = 0x63580000 - 1,
.flags = IORESOURCE_IO,
},
/* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */
PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1,
IORESOURCE_MEM)
/* NP Image - must be video bank 1 (320KiB) */
PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM)
/* NP IPC - must be video bank 2 (512KiB) */
PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM)
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
/*
@ -337,272 +195,146 @@ struct resource dvr_cronus_resources[] __initdata =
struct resource non_dvr_cronus_resources[] __initdata =
{
/*
*
* VIDEO1 / LX1
*
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x24000000,
.end = 0x241FFFFF, /* 2MiB */
.flags = IORESOURCE_MEM,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231a monitor */
.start = 0x24200000,
.end = 0x24201FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "MediaMemory1",
.start = 0x24202000,
.end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_MEM,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x24000000, 0x24200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x24200000, 0x24202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x24202000, 0x26000000-1,
IORESOURCE_MEM)
/*
*
* VIDEO2 / LX2
*
*/
{
.name = "ST231bImage", /* Delta-Mu 2 image and ram */
.start = 0x60000000,
.end = 0x601FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231bMonitor", /* 8KiB block ST231b monitor */
.start = 0x60200000,
.end = 0x60201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory2",
.start = 0x60202000,
.end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/* Delta-Mu 2 image (2MiB) */
PREALLOC_NORMAL("ST231bImage", 0x60000000, 0x60200000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 monitor (8KiB) */
PREALLOC_NORMAL("ST231bMonitor", 0x60200000, 0x60202000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory2", 0x60202000, 0x62000000-1,
IORESOURCE_MEM)
/*
*
* Sysaudio Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* DSP_Image_Buff - DSP code and data images (1MB)
* ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
* ADSC_AUX_Buff - ADSC AUX buffer (16KB)
* ADSC_Main_Buff - ADSC Main buffer (16KB)
*
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* STAVEM driver/STAPI
*
* This driver requires:
*
* Arbitrary Based Buffers:
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*
*/
{
.name = "AVMEMPartition0",
.start = 0x63580000,
.end = 0x64180000 - 1, /* 12 MB total */
.flags = IORESOURCE_IO,
},
/* 12MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1,
IORESOURCE_MEM)
/*
*
* DOCSIS Subsystem
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "Docsis",
.start = 0x62000000,
.end = 0x62700000 - 1, /* 7 MB total */
.flags = IORESOURCE_IO,
},
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM)
/*
*
* GHW HAL Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* GraphicsHeap - PowerTV Graphics Heap
*
*/
{
.name = "GraphicsHeap",
.start = 0x62700000,
.end = 0x63500000 - 1, /* 14 MB total */
.flags = IORESOURCE_IO,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1,
IORESOURCE_MEM)
/*
*
* multi com buffer area
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "MulticomSHM",
.start = 0x26000000,
.end = 0x26020000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1,
IORESOURCE_MEM)
/*
*
* DMA Ring buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
* DMA Ring buffer (don't need recording buffers)
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer for unit0
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit0
*
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit1
*
* Display bins buffer for unit1
*/
{
.name = "DisplayBins1",
.start = 0x64AD4000,
.end = 0x64AD5000 - 1, /* 4 KB total */
.flags = IORESOURCE_IO,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
*
* AVFS: player HAL memory
*
*
*/
{
.name = "AvfsDmaMem",
.start = 0x6430E000,
.end = 0x645D2C00 - 1, /* 945K * 3 for playback */
.flags = IORESOURCE_IO,
},
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1, IORESOURCE_MEM)
/*
*
* PMEM
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Persistent memory for diagnostics.
*
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Smartcard
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Read and write buffers for Internal/External cards
*
*/
{
.name = "SmartCardInfo",
.start = 0x64AD1000,
.end = 0x64AD3800 - 1,
.flags = IORESOURCE_IO,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM)
/*
*
* KAVNET
* NP Reset Vector - must be of the form xxCxxxxx
* NP Image - must be video bank 1
* NP IPC - must be video bank 2
*/
/* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */
PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1,
IORESOURCE_MEM)
/* NP Image - must be video bank 1 (320KiB) */
PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM)
/* NP IPC - must be video bank 2 (512KiB) */
PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM)
/*
* NAND Flash
*/
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* Add other resources here
*/
/*
* End of Resource marker
*/
{
.name = "NP_Reset_Vector",
.start = 0x27c00000,
.end = 0x27c01000 - 1,
.flags = IORESOURCE_MEM,
.flags = 0,
},
{
.name = "NP_Image",
.start = 0x27020000,
.end = 0x27060000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_IPC",
.start = 0x63500000,
.end = 0x63580000 - 1,
.flags = IORESOURCE_IO,
},
{ },
};

View File

@ -22,7 +22,9 @@
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* NON_DVR_CAPABLE CRONUSLITE RESOURCES
@ -30,261 +32,143 @@
struct resource non_dvr_cronuslite_resources[] __initdata =
{
/*
*
* VIDEO2 / LX2
*
*/
{
.name = "ST231aImage", /* Delta-Mu 2 image and ram */
.start = 0x60000000,
.end = 0x601FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231b monitor */
.start = 0x60200000,
.end = 0x60201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory1",
.start = 0x60202000,
.end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x60000000, 0x60200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x60200000, 0x60202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x60202000, 0x62000000-1,
IORESOURCE_MEM)
/*
*
* Sysaudio Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* DSP_Image_Buff - DSP code and data images (1MB)
* ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
* ADSC_AUX_Buff - ADSC AUX buffer (16KB)
* ADSC_Main_Buff - ADSC Main buffer (16KB)
*
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (128KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (128KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00020000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* STAVEM driver/STAPI
*
* This driver requires:
*
* Arbitrary Based Buffers:
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*
*/
{
.name = "AVMEMPartition0",
.start = 0x63580000,
.end = 0x63B80000 - 1, /* 6 MB total */
.flags = IORESOURCE_IO,
},
/* 6MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1,
IORESOURCE_MEM)
/*
*
* DOCSIS Subsystem
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "Docsis",
.start = 0x62000000,
.end = 0x62700000 - 1, /* 7 MB total */
.flags = IORESOURCE_IO,
},
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x67500000, 0x67c00000-1, IORESOURCE_MEM)
/*
*
* GHW HAL Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* GraphicsHeap - PowerTV Graphics Heap
*
*/
{
.name = "GraphicsHeap",
.start = 0x62700000,
.end = 0x63500000 - 1, /* 14 MB total */
.flags = IORESOURCE_IO,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x62700000, 0x63500000-1,
IORESOURCE_MEM)
/*
*
* multi com buffer area
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "MulticomSHM",
.start = 0x26000000,
.end = 0x26020000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x26000000, 0x26020000-1,
IORESOURCE_MEM)
/*
*
* DMA Ring buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
* DMA Ring buffer (don't need recording buffers)
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x000AA000 - 1,
.flags = IORESOURCE_MEM,
},
/* 680KiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x000AA000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer for unit0
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit0
*
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit1
*
* Display bins buffer for unit1
*/
{
.name = "DisplayBins1",
.start = 0x63B83000,
.end = 0x63B84000 - 1, /* 4 KB total */
.flags = IORESOURCE_IO,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
IORESOURCE_MEM)
/*
*
* AVFS: player HAL memory
*
*
*/
{
.name = "AvfsDmaMem",
.start = 0x63B84000,
.end = 0x63E48C00 - 1, /* 945K * 3 for playback */
.flags = IORESOURCE_IO,
},
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* PMEM
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Persistent memory for diagnostics.
*
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Smartcard
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Read and write buffers for Internal/External cards
*
*/
{
.name = "SmartCardInfo",
.start = 0x63B80000,
.end = 0x63B82800 - 1,
.flags = IORESOURCE_IO,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1, IORESOURCE_MEM)
/*
*
* KAVNET
* NP Reset Vector - must be of the form xxCxxxxx
* NP Image - must be video bank 1
* NP IPC - must be video bank 2
*/
{
.name = "NP_Reset_Vector",
.start = 0x27c00000,
.end = 0x27c01000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_Image",
.start = 0x27020000,
.end = 0x27060000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "NP_IPC",
.start = 0x63500000,
.end = 0x63580000 - 1,
.flags = IORESOURCE_IO,
},
/* NP Reset Vector - must be of the form xxCxxxxx (4KiB) */
PREALLOC_NORMAL("NP_Reset_Vector", 0x27c00000, 0x27c01000-1,
IORESOURCE_MEM)
/* NP Image - must be video bank 1 (320KiB) */
PREALLOC_NORMAL("NP_Image", 0x27020000, 0x27070000-1, IORESOURCE_MEM)
/* NP IPC - must be video bank 2 (512KiB) */
PREALLOC_NORMAL("NP_IPC", 0x63500000, 0x63580000-1, IORESOURCE_MEM)
/*
* NAND Flash
*/
{
.name = "NandFlash",
.start = NAND_FLASH_BASE,
.end = NAND_FLASH_BASE + 0x400 - 1,
.flags = IORESOURCE_IO,
},
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

View File

@ -22,7 +22,9 @@
*/
#include <linux/init.h>
#include <linux/ioport.h>
#include <asm/mach-powertv/asic.h>
#include "prealloc.h"
/*
* DVR_CAPABLE RESOURCES
@ -30,280 +32,151 @@
struct resource dvr_zeus_resources[] __initdata =
{
/*
*
* VIDEO1 / LX1
*
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x20000000,
.end = 0x201FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231a monitor */
.start = 0x20200000,
.end = 0x20201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory1",
.start = 0x20202000,
.end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1,
IORESOURCE_MEM)
/*
*
* VIDEO2 / LX2
*
*/
{
.name = "ST231bImage", /* Delta-Mu 2 image and ram */
.start = 0x30000000,
.end = 0x301FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231bMonitor", /* 8KiB block ST231b monitor */
.start = 0x30200000,
.end = 0x30201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory2",
.start = 0x30202000,
.end = 0x31FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/* Delta-Mu 2 image (2MiB) */
PREALLOC_NORMAL("ST231bImage", 0x30000000, 0x30200000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 monitor (8KiB) */
PREALLOC_NORMAL("ST231bMonitor", 0x30200000, 0x30202000-1,
IORESOURCE_MEM)
/* Delta-Mu 2 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory2", 0x30202000, 0x32000000-1,
IORESOURCE_MEM)
/*
*
* Sysaudio Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* DSP_Image_Buff - DSP code and data images (1MB)
* ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB)
* ADSC_AUX_Buff - ADSC AUX buffer (16KB)
* ADSC_Main_Buff - ADSC Main buffer (16KB)
*
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (16KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (16KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* STAVEM driver/STAPI
*
* This driver requires:
*
* Arbitrary Based Buffers:
* This memory area is used for allocating buffers for Video decoding
* purposes. Allocation/De-allocation within this buffer is managed
* by the STAVMEM driver of the STAPI. They could be Decimated
* Picture Buffers, Intermediate Buffers, as deemed necessary for
* video decoding purposes, for any video decoders on Zeus.
*
*/
{
.name = "AVMEMPartition0",
.start = 0x00000000,
.end = 0x00c00000 - 1, /* 12 MB total */
.flags = IORESOURCE_MEM,
},
/* 12MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00c00000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* DOCSIS Subsystem
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "Docsis",
.start = 0x40100000,
.end = 0x407fffff,
.flags = IORESOURCE_MEM,
},
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM)
/*
*
* GHW HAL Driver
*
* This driver requires:
*
* Arbitrary Based Buffers:
* GraphicsHeap - PowerTV Graphics Heap
*
*/
{
.name = "GraphicsHeap",
.start = 0x46900000,
.end = 0x47700000 - 1, /* 14 MB total */
.flags = IORESOURCE_MEM,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1,
IORESOURCE_MEM)
/*
*
* multi com buffer area
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "MulticomSHM",
.start = 0x47900000,
.end = 0x47920000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1,
IORESOURCE_MEM)
/*
*
* DMA Ring buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x00280000 - 1,
.flags = IORESOURCE_MEM,
},
/* 2.5MiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer for unit0
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit0
*
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Display bins buffer
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Display Bins for unit1
*
* Display bins buffer for unit1
*/
{
.name = "DisplayBins1",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins1", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* ITFS
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "ITFS",
.start = 0x00000000,
/* 815,104 bytes each for 2 ITFS partitions. */
.end = 0x0018DFFF,
.flags = IORESOURCE_MEM,
},
/* 815,104 bytes each for 2 ITFS partitions. */
PREALLOC_NORMAL("ITFS", 0x00000000, 0x0018E000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* AVFS
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Docsis -
*
*/
{
.name = "AvfsDmaMem",
.start = 0x00000000,
/* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
.end = 0x007c2000 - 1,
.flags = IORESOURCE_MEM,
},
{
.name = "AvfsFileSys",
.start = 0x00000000,
.end = 0x00001000 - 1, /* 4K */
.flags = IORESOURCE_MEM,
},
/* (945K * 8) = (128K * 3) 5 playbacks / 3 server */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x007c2000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* 4KiB */
PREALLOC_NORMAL("AvfsFileSys", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* PMEM
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Persistent memory for diagnostics.
*
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* Smartcard
*
* This driver requires:
*
* Arbitrary Based Buffers:
* Read and write buffers for Internal/External cards
*
*/
{
.name = "SmartCardInfo",
.start = 0x00000000,
.end = 0x2800 - 1,
.flags = IORESOURCE_MEM,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};
/*
@ -314,146 +187,118 @@ struct resource non_dvr_zeus_resources[] __initdata =
/*
* VIDEO1 / LX1
*/
{
.name = "ST231aImage", /* Delta-Mu 1 image and ram */
.start = 0x20000000,
.end = 0x201FFFFF, /* 2MiB */
.flags = IORESOURCE_IO,
},
{
.name = "ST231aMonitor", /* 8KiB block ST231a monitor */
.start = 0x20200000,
.end = 0x20201FFF,
.flags = IORESOURCE_IO,
},
{
.name = "MediaMemory1",
.start = 0x20202000,
.end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */
.flags = IORESOURCE_IO,
},
/* Delta-Mu 1 image (2MiB) */
PREALLOC_NORMAL("ST231aImage", 0x20000000, 0x20200000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 monitor (8KiB) */
PREALLOC_NORMAL("ST231aMonitor", 0x20200000, 0x20202000-1,
IORESOURCE_MEM)
/* Delta-Mu 1 RAM (~29.9MiB (32MiB - (2MiB + 8KiB))) */
PREALLOC_NORMAL("MediaMemory1", 0x20202000, 0x22000000-1,
IORESOURCE_MEM)
/*
* Sysaudio Driver
*/
{
.name = "DSP_Image_Buff",
.start = 0x00000000,
.end = 0x000FFFFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_CPU_PCM_Buff",
.start = 0x00000000,
.end = 0x00009FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_AUX_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
{
.name = "ADSC_Main_Buff",
.start = 0x00000000,
.end = 0x00003FFF,
.flags = IORESOURCE_MEM,
},
/* DSP code and data images (1MiB) */
PREALLOC_NORMAL("DSP_Image_Buff", 0x00000000, 0x00100000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC CPU PCM buffer (40KiB) */
PREALLOC_NORMAL("ADSC_CPU_PCM_Buff", 0x00000000, 0x0000A000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC AUX buffer (16KiB) */
PREALLOC_NORMAL("ADSC_AUX_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/* ADSC Main buffer (16KiB) */
PREALLOC_NORMAL("ADSC_Main_Buff", 0x00000000, 0x00004000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* STAVEM driver/STAPI
*/
{
.name = "AVMEMPartition0",
.start = 0x00000000,
.end = 0x00600000 - 1, /* 6 MB total */
.flags = IORESOURCE_MEM,
},
/* 6MiB */
PREALLOC_NORMAL("AVMEMPartition0", 0x00000000, 0x00600000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* DOCSIS Subsystem
*/
{
.name = "Docsis",
.start = 0x40100000,
.end = 0x407fffff,
.flags = IORESOURCE_MEM,
},
/* 7MiB */
PREALLOC_DOCSIS("Docsis", 0x40100000, 0x40800000-1, IORESOURCE_MEM)
/*
* GHW HAL Driver
*/
{
.name = "GraphicsHeap",
.start = 0x46900000,
.end = 0x47700000 - 1, /* 14 MB total */
.flags = IORESOURCE_MEM,
},
/* PowerTV Graphics Heap (14MiB) */
PREALLOC_NORMAL("GraphicsHeap", 0x46900000, 0x47700000-1,
IORESOURCE_MEM)
/*
* multi com buffer area
*/
{
.name = "MulticomSHM",
.start = 0x47900000,
.end = 0x47920000 - 1,
.flags = IORESOURCE_MEM,
},
/* 128KiB */
PREALLOC_NORMAL("MulticomSHM", 0x47900000, 0x47920000-1,
IORESOURCE_MEM)
/*
* DMA Ring buffer
*/
{
.name = "BMM_Buffer",
.start = 0x00000000,
.end = 0x00280000 - 1,
.flags = IORESOURCE_MEM,
},
/* 2.5MiB */
PREALLOC_NORMAL("BMM_Buffer", 0x00000000, 0x00280000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Display bins buffer for unit0
*/
{
.name = "DisplayBins0",
.start = 0x00000000,
.end = 0x00000FFF, /* 4 KB total */
.flags = IORESOURCE_MEM,
},
/* 4KiB */
PREALLOC_NORMAL("DisplayBins0", 0x00000000, 0x00001000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
*
* AVFS: player HAL memory
*
*
*/
{
.name = "AvfsDmaMem",
.start = 0x00000000,
.end = 0x002c4c00 - 1, /* 945K * 3 for playback */
.flags = IORESOURCE_MEM,
},
/* 945K * 3 for playback */
PREALLOC_NORMAL("AvfsDmaMem", 0x00000000, 0x002c4c00-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* PMEM
*/
{
.name = "DiagPersistentMemory",
.start = 0x00000000,
.end = 0x10000 - 1,
.flags = IORESOURCE_MEM,
},
/* Persistent memory for diagnostics (64KiB) */
PREALLOC_PMEM("DiagPersistentMemory", 0x00000000, 0x10000-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Smartcard
*/
{
.name = "SmartCardInfo",
.start = 0x00000000,
.end = 0x2800 - 1,
.flags = IORESOURCE_MEM,
},
/* Read and write buffers for Internal/External cards (10KiB) */
PREALLOC_NORMAL("SmartCardInfo", 0x00000000, 0x2800-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* NAND Flash
*/
{
.name = "NandFlash",
.start = NAND_FLASH_BASE,
.end = NAND_FLASH_BASE + 0x400 - 1,
.flags = IORESOURCE_IO,
},
/* 10KiB */
PREALLOC_NORMAL("NandFlash", NAND_FLASH_BASE, NAND_FLASH_BASE+0x400-1,
IORESOURCE_MEM)
/*
* TFTPBuffer
*
* This buffer is used in some minimal configurations (e.g. two-way
* loader) for storing software images
*/
PREALLOC_TFTP("TFTPBuffer", 0x00000000, MEBIBYTE(80)-1,
(IORESOURCE_MEM|IORESOURCE_PTV_RES_LOEXT))
/*
* Add other resources here
*/
{ },
/*
* End of Resource marker
*/
{
.flags = 0,
},
};

View File

@ -0,0 +1,70 @@
/*
* Definitions for memory preallocations
*
* Copyright (C) 2005-2009 Scientific-Atlanta, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H
#define _ARCH_MIPS_POWERTV_ASIC_PREALLOC_H
#define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */
#define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */
/* "struct resource" array element definition */
#define PREALLOC(NAME, START, END, FLAGS) { \
.name = (NAME), \
.start = (START), \
.end = (END), \
.flags = (FLAGS) \
},
/* Individual resources in the preallocated resource arrays are defined using
* macros. These macros are conditionally defined based on their
* corresponding kernel configuration flag:
* - CONFIG_PREALLOC_NORMAL: preallocate resources for a normal settop box
* - CONFIG_PREALLOC_TFTP: preallocate the TFTP download resource
* - CONFIG_PREALLOC_DOCSIS: preallocate the DOCSIS resource
* - CONFIG_PREALLOC_PMEM: reserve space for persistent memory
*/
#ifdef CONFIG_PREALLOC_NORMAL
#define PREALLOC_NORMAL(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_NORMAL(name, start, end, flags)
#endif
#ifdef CONFIG_PREALLOC_TFTP
#define PREALLOC_TFTP(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_TFTP(name, start, end, flags)
#endif
#ifdef CONFIG_PREALLOC_DOCSIS
#define PREALLOC_DOCSIS(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_DOCSIS(name, start, end, flags)
#endif
#ifdef CONFIG_PREALLOC_PMEM
#define PREALLOC_PMEM(name, start, end, flags) \
PREALLOC(name, start, end, flags)
#else
#define PREALLOC_PMEM(name, start, end, flags)
#endif
#endif

View File

@ -238,31 +238,32 @@ static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
rtc_control = CMOS_READ(RTC_CONTROL);
spin_unlock_irq(&rtc_lock);
/* REVISIT this assumes PC style usage: always BCD */
if (((unsigned)t->time.tm_sec) < 0x60)
t->time.tm_sec = bcd2bin(t->time.tm_sec);
else
t->time.tm_sec = -1;
if (((unsigned)t->time.tm_min) < 0x60)
t->time.tm_min = bcd2bin(t->time.tm_min);
else
t->time.tm_min = -1;
if (((unsigned)t->time.tm_hour) < 0x24)
t->time.tm_hour = bcd2bin(t->time.tm_hour);
else
t->time.tm_hour = -1;
if (cmos->day_alrm) {
if (((unsigned)t->time.tm_mday) <= 0x31)
t->time.tm_mday = bcd2bin(t->time.tm_mday);
if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
if (((unsigned)t->time.tm_sec) < 0x60)
t->time.tm_sec = bcd2bin(t->time.tm_sec);
else
t->time.tm_mday = -1;
if (cmos->mon_alrm) {
if (((unsigned)t->time.tm_mon) <= 0x12)
t->time.tm_mon = bcd2bin(t->time.tm_mon) - 1;
t->time.tm_sec = -1;
if (((unsigned)t->time.tm_min) < 0x60)
t->time.tm_min = bcd2bin(t->time.tm_min);
else
t->time.tm_min = -1;
if (((unsigned)t->time.tm_hour) < 0x24)
t->time.tm_hour = bcd2bin(t->time.tm_hour);
else
t->time.tm_hour = -1;
if (cmos->day_alrm) {
if (((unsigned)t->time.tm_mday) <= 0x31)
t->time.tm_mday = bcd2bin(t->time.tm_mday);
else
t->time.tm_mon = -1;
t->time.tm_mday = -1;
if (cmos->mon_alrm) {
if (((unsigned)t->time.tm_mon) <= 0x12)
t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
else
t->time.tm_mon = -1;
}
}
}
t->time.tm_year = -1;
@ -322,29 +323,26 @@ static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
{
struct cmos_rtc *cmos = dev_get_drvdata(dev);
unsigned char mon, mday, hrs, min, sec;
unsigned char mon, mday, hrs, min, sec, rtc_control;
if (!is_valid_irq(cmos->irq))
return -EIO;
/* REVISIT this assumes PC style usage: always BCD */
/* Writing 0xff means "don't care" or "match all". */
mon = t->time.tm_mon + 1;
mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
mday = t->time.tm_mday;
mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
hrs = t->time.tm_hour;
hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
min = t->time.tm_min;
min = (min < 60) ? bin2bcd(min) : 0xff;
sec = t->time.tm_sec;
sec = (sec < 60) ? bin2bcd(sec) : 0xff;
rtc_control = CMOS_READ(RTC_CONTROL);
if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
/* Writing 0xff means "don't care" or "match all". */
mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
min = (min < 60) ? bin2bcd(min) : 0xff;
sec = (sec < 60) ? bin2bcd(sec) : 0xff;
}
spin_lock_irq(&rtc_lock);
@ -478,7 +476,7 @@ static int cmos_procfs(struct device *dev, struct seq_file *seq)
"update_IRQ\t: %s\n"
"HPET_emulated\t: %s\n"
// "square_wave\t: %s\n"
// "BCD\t\t: %s\n"
"BCD\t\t: %s\n"
"DST_enable\t: %s\n"
"periodic_freq\t: %d\n"
"batt_status\t: %s\n",
@ -486,7 +484,7 @@ static int cmos_procfs(struct device *dev, struct seq_file *seq)
(rtc_control & RTC_UIE) ? "yes" : "no",
is_hpet_enabled() ? "yes" : "no",
// (rtc_control & RTC_SQWE) ? "yes" : "no",
// (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
(rtc_control & RTC_DM_BINARY) ? "no" : "yes",
(rtc_control & RTC_DST_EN) ? "yes" : "no",
cmos->rtc->irq_freq,
(valid & RTC_VRT) ? "okay" : "dead");
@ -751,12 +749,11 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
spin_unlock_irq(&rtc_lock);
/* FIXME teach the alarm code how to handle binary mode;
/* FIXME:
* <asm-generic/rtc.h> doesn't know 12-hour mode either.
*/
if (is_valid_irq(rtc_irq) &&
(!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY)))) {
dev_dbg(dev, "only 24-hr BCD mode supported\n");
if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
dev_warn(dev, "only 24-hr supported\n");
retval = -ENXIO;
goto cleanup1;
}