staging/rdma/hfi1: Fix per-VL transmit discard counts
Implement per-VL transmit counters. Not all errors can be attributed to a particular VL, so make a best attempt. o Extend the egress error bits used to count toward transmit discard. o When an egress error or send error occur, try to map back to a VL. o Implement a SDMA engine to VL (back) map. o Add per-VL port transmit counters Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Dean Luick <dean.luick@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -510,6 +510,12 @@ static struct flag_table sdma_err_status_flags[] = {
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| SEND_DMA_ERR_STATUS_SDMA_CSR_PARITY_ERR_SMASK \
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| SEND_DMA_ERR_STATUS_SDMA_PCIE_REQ_TRACKING_UNC_ERR_SMASK)
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/* SendEgressErrInfo bits that correspond to a PortXmitDiscard counter */
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#define PORT_DISCARD_EGRESS_ERRS \
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(SEND_EGRESS_ERR_INFO_TOO_LONG_IB_PACKET_ERR_SMASK \
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| SEND_EGRESS_ERR_INFO_VL_MAPPING_ERR_SMASK \
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| SEND_EGRESS_ERR_INFO_VL_ERR_SMASK)
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/*
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* TXE Egress Error flags
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*/
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@ -1481,12 +1487,18 @@ static u64 access_sw_unknown_frame_cnt(const struct cntr_entry *entry,
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static u64 access_sw_xmit_discards(const struct cntr_entry *entry,
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void *context, int vl, int mode, u64 data)
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{
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struct hfi1_pportdata *ppd = context;
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struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)context;
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u64 zero = 0;
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u64 *counter;
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if (vl != CNTR_INVALID_VL)
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return 0;
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if (vl == CNTR_INVALID_VL)
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counter = &ppd->port_xmit_discards;
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else if (vl >= 0 && vl < C_VL_COUNT)
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counter = &ppd->port_xmit_discards_vl[vl];
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else
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counter = &zero;
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return read_write_sw(ppd->dd, &ppd->port_xmit_discards, mode, data);
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return read_write_sw(ppd->dd, counter, mode, data);
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}
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static u64 access_xmit_constraint_errs(const struct cntr_entry *entry,
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@ -5508,12 +5520,14 @@ static void handle_sdma_err(struct hfi1_devdata *dd, u32 unused, u64 reg)
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}
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}
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static inline void __count_port_discards(struct hfi1_pportdata *ppd)
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{
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incr_cntr64(&ppd->port_xmit_discards);
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}
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static void count_port_inactive(struct hfi1_devdata *dd)
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{
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struct hfi1_pportdata *ppd = dd->pport;
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if (ppd->port_xmit_discards < ~(u64)0)
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ppd->port_xmit_discards++;
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__count_port_discards(dd->pport);
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}
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/*
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@ -5525,7 +5539,8 @@ static void count_port_inactive(struct hfi1_devdata *dd)
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* egress error if more than one packet fails the same integrity check
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* since we cleared the corresponding bit in SEND_EGRESS_ERR_INFO.
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*/
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static void handle_send_egress_err_info(struct hfi1_devdata *dd)
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static void handle_send_egress_err_info(struct hfi1_devdata *dd,
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int vl)
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{
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struct hfi1_pportdata *ppd = dd->pport;
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u64 src = read_csr(dd, SEND_EGRESS_ERR_SOURCE); /* read first */
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@ -5540,10 +5555,24 @@ static void handle_send_egress_err_info(struct hfi1_devdata *dd)
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info, egress_err_info_string(buf, sizeof(buf), info), src);
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/* Eventually add other counters for each bit */
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if (info & PORT_DISCARD_EGRESS_ERRS) {
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int weight, i;
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if (info & SEND_EGRESS_ERR_INFO_TOO_LONG_IB_PACKET_ERR_SMASK) {
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if (ppd->port_xmit_discards < ~(u64)0)
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ppd->port_xmit_discards++;
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/*
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* Count all, in case multiple bits are set. Reminder:
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* since there is only one info register for many sources,
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* these may be attributed to the wrong VL if they occur
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* too close together.
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*/
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weight = hweight64(info);
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for (i = 0; i < weight; i++) {
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__count_port_discards(ppd);
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if (vl >= 0 && vl < TXE_NUM_DATA_VL)
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incr_cntr64(&ppd->port_xmit_discards_vl[vl]);
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else if (vl == 15)
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incr_cntr64(&ppd->port_xmit_discards_vl
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[C_VL_15]);
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}
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}
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}
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@ -5561,12 +5590,71 @@ static inline int port_inactive_err(u64 posn)
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* Input value is a bit position within the SEND_EGRESS_ERR_STATUS
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* register. Does it represent a 'disallowed packet' error?
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*/
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static inline int disallowed_pkt_err(u64 posn)
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static inline int disallowed_pkt_err(int posn)
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{
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return (posn >= SEES(TX_SDMA0_DISALLOWED_PACKET) &&
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posn <= SEES(TX_SDMA15_DISALLOWED_PACKET));
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}
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/*
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* Input value is a bit position of one of the SDMA engine disallowed
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* packet errors. Return which engine. Use of this must be guarded by
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* disallowed_pkt_err().
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*/
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static inline int disallowed_pkt_engine(int posn)
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{
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return posn - SEES(TX_SDMA0_DISALLOWED_PACKET);
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}
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/*
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* Translate an SDMA engine to a VL. Return -1 if the tranlation cannot
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* be done.
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*/
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static int engine_to_vl(struct hfi1_devdata *dd, int engine)
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{
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struct sdma_vl_map *m;
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int vl;
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/* range check */
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if (engine < 0 || engine >= TXE_NUM_SDMA_ENGINES)
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return -1;
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rcu_read_lock();
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m = rcu_dereference(dd->sdma_map);
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vl = m->engine_to_vl[engine];
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rcu_read_unlock();
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return vl;
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}
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/*
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* Translate the send context (sofware index) into a VL. Return -1 if the
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* translation cannot be done.
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*/
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static int sc_to_vl(struct hfi1_devdata *dd, int sw_index)
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{
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struct send_context_info *sci;
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struct send_context *sc;
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int i;
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sci = &dd->send_contexts[sw_index];
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/* there is no information for user (PSM) and ack contexts */
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if (sci->type != SC_KERNEL)
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return -1;
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sc = sci->sc;
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if (!sc)
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return -1;
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if (dd->vld[15].sc == sc)
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return 15;
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for (i = 0; i < num_vls; i++)
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if (dd->vld[i].sc == sc)
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return i;
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return -1;
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}
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static void handle_egress_err(struct hfi1_devdata *dd, u32 unused, u64 reg)
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{
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u64 reg_copy = reg, handled = 0;
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@ -5575,27 +5663,27 @@ static void handle_egress_err(struct hfi1_devdata *dd, u32 unused, u64 reg)
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if (reg & ALL_TXE_EGRESS_FREEZE_ERR)
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start_freeze_handling(dd->pport, 0);
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if (is_ax(dd) && (reg &
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SEND_EGRESS_ERR_STATUS_TX_CREDIT_RETURN_VL_ERR_SMASK)
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&& (dd->icode != ICODE_FUNCTIONAL_SIMULATOR))
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else if (is_ax(dd) &&
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(reg & SEND_EGRESS_ERR_STATUS_TX_CREDIT_RETURN_VL_ERR_SMASK) &&
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(dd->icode != ICODE_FUNCTIONAL_SIMULATOR))
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start_freeze_handling(dd->pport, 0);
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while (reg_copy) {
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int posn = fls64(reg_copy);
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/*
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* fls64() returns a 1-based offset, but we generally
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* want 0-based offsets.
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*/
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/* fls64() returns a 1-based offset, we want it zero based */
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int shift = posn - 1;
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u64 mask = 1ULL << shift;
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if (port_inactive_err(shift)) {
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count_port_inactive(dd);
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handled |= (1ULL << shift);
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handled |= mask;
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} else if (disallowed_pkt_err(shift)) {
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handle_send_egress_err_info(dd);
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handled |= (1ULL << shift);
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int vl = engine_to_vl(dd, disallowed_pkt_engine(shift));
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handle_send_egress_err_info(dd, vl);
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handled |= mask;
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}
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clear_bit(shift, (unsigned long *)®_copy);
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reg_copy &= ~mask;
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}
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reg &= ~handled;
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@ -5739,7 +5827,7 @@ static void is_sendctxt_err_int(struct hfi1_devdata *dd,
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send_context_err_status_string(flags, sizeof(flags), status));
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if (status & SEND_CTXT_ERR_STATUS_PIO_DISALLOWED_PACKET_ERR_SMASK)
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handle_send_egress_err_info(dd);
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handle_send_egress_err_info(dd, sc_to_vl(dd, sw_index));
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/*
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* Automatically restart halted kernel contexts out of interrupt
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@ -709,8 +709,9 @@ struct hfi1_pportdata {
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u64 *cntrs;
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/* port relative synthetic counter buffer */
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u64 *scntrs;
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/* we synthesize port_xmit_discards from several egress errors */
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/* port_xmit_discards are synthesized from different egress errors */
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u64 port_xmit_discards;
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u64 port_xmit_discards_vl[C_VL_COUNT];
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u64 port_xmit_constraint_errors;
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u64 port_rcv_constraint_errors;
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/* count of 'link_err' interrupts from DC */
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@ -890,6 +890,9 @@ int sdma_map_init(struct hfi1_devdata *dd, u8 port, u8 num_vls, u8 *vl_engines)
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newmap->actual_vls = num_vls;
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newmap->vls = roundup_pow_of_two(num_vls);
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newmap->mask = (1 << ilog2(newmap->vls)) - 1;
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/* initialize back-map */
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for (i = 0; i < TXE_NUM_SDMA_ENGINES; i++)
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newmap->engine_to_vl[i] = -1;
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for (i = 0; i < newmap->vls; i++) {
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/* save for wrap around */
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int first_engine = engine;
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@ -913,6 +916,9 @@ int sdma_map_init(struct hfi1_devdata *dd, u8 port, u8 num_vls, u8 *vl_engines)
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/* wrap back to first engine */
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engine = first_engine;
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}
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/* assign back-map */
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for (j = 0; j < vl_engines[i]; j++)
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newmap->engine_to_vl[first_engine + j] = i;
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} else {
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/* just re-use entry without allocating */
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newmap->map[i] = newmap->map[i % num_vls];
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@ -1087,6 +1087,7 @@ struct sdma_map_elem {
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/**
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* struct sdma_map_el - mapping for a vl
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* @engine_to_vl - map of an engine to a vl
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* @list - rcu head for free callback
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* @mask - vl mask to "mod" the vl to produce an index to map array
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* @actual_vls - number of vls
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@ -1098,6 +1099,7 @@ struct sdma_map_elem {
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* in turn point to an array of sde's for that vl.
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*/
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struct sdma_vl_map {
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s8 engine_to_vl[TXE_NUM_SDMA_ENGINES];
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struct rcu_head list;
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u32 mask;
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u8 actual_vls;
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