V4L/DVB (7574): mt312: Add support for zl10313 demod
Add zl10313 support to mt312 driver. zl10313 uses 10.111MHz xtal. Signed-off-by: Matthias Schwarzott <zzam@gentoo.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -1,7 +1,8 @@
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/*
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/*
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Driver for Zarlink VP310/MT312 Satellite Channel Decoder
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Driver for Zarlink VP310/MT312/ZL10313 Satellite Channel Decoder
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Copyright (C) 2003 Andreas Oberritter <obi@linuxtv.org>
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Copyright (C) 2003 Andreas Oberritter <obi@linuxtv.org>
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Copyright (C) 2008 Matthias Schwarzott <zzam@gentoo.org>
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This program is free software; you can redistribute it and/or modify
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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it under the terms of the GNU General Public License as published by
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@ -55,6 +56,7 @@ static int debug;
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} while (0)
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} while (0)
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#define MT312_PLL_CLK 10000000UL /* 10 MHz */
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#define MT312_PLL_CLK 10000000UL /* 10 MHz */
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#define MT312_PLL_CLK_10_111 10111000UL /* 10.111 MHz */
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static int mt312_read(struct mt312_state *state, const enum mt312_reg_addr reg,
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static int mt312_read(struct mt312_state *state, const enum mt312_reg_addr reg,
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u8 *buf, const size_t count)
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u8 *buf, const size_t count)
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@ -264,6 +266,32 @@ static int mt312_initfe(struct dvb_frontend *fe)
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return ret;
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return ret;
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}
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}
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switch (state->id) {
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case ID_ZL10313:
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/* enable ADC */
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ret = mt312_writereg(state, GPP_CTRL, 0x80);
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if (ret < 0)
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return ret;
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/* configure ZL10313 for optimal ADC performance */
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buf[0] = 0x80;
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buf[1] = 0xB0;
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ret = mt312_write(state, HW_CTRL, buf, 2);
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if (ret < 0)
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return ret;
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/* enable MPEG output and ADCs */
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ret = mt312_writereg(state, HW_CTRL, 0x00);
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if (ret < 0)
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return ret;
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ret = mt312_writereg(state, MPEG_CTRL, 0x00);
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if (ret < 0)
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return ret;
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break;
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}
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/* SYS_CLK */
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/* SYS_CLK */
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buf[0] = mt312_div(state->xtal * state->freq_mult * 2, 1000000);
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buf[0] = mt312_div(state->xtal * state->freq_mult * 2, 1000000);
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@ -278,7 +306,17 @@ static int mt312_initfe(struct dvb_frontend *fe)
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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ret = mt312_writereg(state, OP_CTRL, 0x53);
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/* different MOCLK polarity */
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switch (state->id) {
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case ID_ZL10313:
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buf[0] = 0x33;
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break;
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default:
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buf[0] = 0x53;
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break;
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}
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ret = mt312_writereg(state, OP_CTRL, buf[0]);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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@ -552,6 +590,7 @@ static int mt312_set_frontend(struct dvb_frontend *fe,
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break;
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break;
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case ID_MT312:
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case ID_MT312:
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case ID_ZL10313:
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break;
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break;
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default:
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default:
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@ -617,11 +656,29 @@ static int mt312_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
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{
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{
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struct mt312_state *state = fe->demodulator_priv;
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struct mt312_state *state = fe->demodulator_priv;
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if (enable) {
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u8 val = 0x00;
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return mt312_writereg(state, GPP_CTRL, 0x40);
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int ret;
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} else {
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return mt312_writereg(state, GPP_CTRL, 0x00);
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switch (state->id) {
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case ID_ZL10313:
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ret = mt312_readreg(state, GPP_CTRL, &val);
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if (ret < 0)
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goto error;
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/* preserve this bit to not accidently shutdown ADC */
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val &= 0x80;
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break;
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}
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}
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if (enable)
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val |= 0x40;
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else
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val &= ~0x40;
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ret = mt312_writereg(state, GPP_CTRL, val);
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error:
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return ret;
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}
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}
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static int mt312_sleep(struct dvb_frontend *fe)
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static int mt312_sleep(struct dvb_frontend *fe)
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@ -635,6 +692,18 @@ static int mt312_sleep(struct dvb_frontend *fe)
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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if (state->id == ID_ZL10313) {
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/* reset ADC */
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ret = mt312_writereg(state, GPP_CTRL, 0x00);
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if (ret < 0)
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return ret;
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/* full shutdown of ADCs, mpeg bus tristated */
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ret = mt312_writereg(state, HW_CTRL, 0x0d);
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if (ret < 0)
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return ret;
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}
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ret = mt312_readreg(state, CONFIG, &config);
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ret = mt312_readreg(state, CONFIG, &config);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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@ -736,8 +805,13 @@ struct dvb_frontend *vp310_mt312_attach(const struct mt312_config *config,
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state->xtal = MT312_PLL_CLK;
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state->xtal = MT312_PLL_CLK;
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state->freq_mult = 6;
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state->freq_mult = 6;
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break;
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break;
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case ID_ZL10313:
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strcpy(state->frontend.ops.info.name, "Zarlink ZL10313 DVB-S");
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state->xtal = MT312_PLL_CLK_10_111;
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state->freq_mult = 9;
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break;
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default:
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default:
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printk(KERN_WARNING "Only Zarlink VP310/MT312"
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printk(KERN_WARNING "Only Zarlink VP310/MT312/ZL10313"
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" are supported chips.\n");
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" are supported chips.\n");
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goto error;
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goto error;
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}
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}
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@ -753,7 +827,7 @@ EXPORT_SYMBOL(vp310_mt312_attach);
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module_param(debug, int, 0644);
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
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MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
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MODULE_DESCRIPTION("Zarlink VP310/MT312 DVB-S Demodulator driver");
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MODULE_DESCRIPTION("Zarlink VP310/MT312/ZL10313 DVB-S Demodulator driver");
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MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
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MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
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MODULE_LICENSE("GPL");
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MODULE_LICENSE("GPL");
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@ -110,6 +110,8 @@ enum mt312_reg_addr {
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VIT_ERRPER_H = 83,
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VIT_ERRPER_H = 83,
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VIT_ERRPER_M = 84,
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VIT_ERRPER_M = 84,
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VIT_ERRPER_L = 85,
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VIT_ERRPER_L = 85,
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HW_CTRL = 84, /* ZL10313 only */
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MPEG_CTRL = 85, /* ZL10313 only */
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VIT_SETUP = 86,
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VIT_SETUP = 86,
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VIT_REF0 = 87,
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VIT_REF0 = 87,
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VIT_REF1 = 88,
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VIT_REF1 = 88,
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@ -156,7 +158,8 @@ enum mt312_reg_addr {
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enum mt312_model_id {
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enum mt312_model_id {
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ID_VP310 = 1,
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ID_VP310 = 1,
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ID_MT312 = 3
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ID_MT312 = 3,
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ID_ZL10313 = 5,
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};
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};
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#endif /* DVB_FRONTENDS_MT312_PRIV */
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#endif /* DVB_FRONTENDS_MT312_PRIV */
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