irqchip/gic, gic-v3: Make SGIs use handle_percpu_devid_irq()
handle_percpu_devid_fasteoi_ipi() states: * The biggest difference with the IRQ version is that the interrupt is * EOIed early, as the IPI could result in a context switch, and we need to * make sure the IPI can fire again All that can actually happen scheduler-wise within the handling of an IPI is the raising of TIF_NEED_RESCHED (and / or folding thereof into preempt_count); see scheduler_ipi() or sched_ttwu_pending() for instance. Said flag / preempt_count is evaluated some time later before returning to whatever context was interrupted, and this gates a call to preempt_schedule_irq() (arm64_preempt_schedule_irq() in arm64). Per the above, SGI's do not need a different handler than PPI's, so make them use the same (handle_percpu_devid_irq). Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20201109094121.29975-2-valentin.schneider@arm.com
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@ -1302,12 +1302,6 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
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switch (__get_intid_range(hw)) {
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case SGI_RANGE:
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irq_set_percpu_devid(irq);
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irq_domain_set_info(d, irq, hw, chip, d->host_data,
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handle_percpu_devid_fasteoi_ipi,
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NULL, NULL);
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break;
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case PPI_RANGE:
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case EPPI_RANGE:
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irq_set_percpu_devid(irq);
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@ -1005,13 +1005,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
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struct irq_data *irqd = irq_desc_get_irq_data(irq_to_desc(irq));
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switch (hw) {
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case 0 ... 15:
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irq_set_percpu_devid(irq);
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irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
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handle_percpu_devid_fasteoi_ipi,
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NULL, NULL);
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break;
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case 16 ... 31:
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case 0 ... 31:
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irq_set_percpu_devid(irq);
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irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
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handle_percpu_devid_irq, NULL, NULL);
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