dt-bindings: interrupt-controller: Convert Amlogic Meson GPIO interrupt controller binding
Convert Amlogic Meson GPIO interrupt controller binding to yaml. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/e06e9f26-cf55-5596-c799-d698e9d7b409@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Amlogic meson GPIO interrupt controller
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Meson SoCs contains an interrupt controller which is able to watch the SoC
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pads and generate an interrupt on edge or level. The controller is essentially
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a 256 pads to 8 GIC interrupt multiplexer, with a filter block to select edge
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or level and polarity. It does not expose all 256 mux inputs because the
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documentation shows that the upper part is not mapped to any pad. The actual
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number of interrupt exposed depends on the SoC.
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Required properties:
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- compatible : must have "amlogic,meson8-gpio-intc" and either
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"amlogic,meson8-gpio-intc" for meson8 SoCs (S802) or
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"amlogic,meson8b-gpio-intc" for meson8b SoCs (S805) or
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"amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or
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"amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912)
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"amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X)
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"amlogic,meson-g12a-gpio-intc" for G12A SoCs (S905D2, S905X2, S905Y2)
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"amlogic,meson-sm1-gpio-intc" for SM1 SoCs (S905D3, S905X3, S905Y3)
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"amlogic,meson-a1-gpio-intc" for A1 SoCs (A113L)
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"amlogic,meson-s4-gpio-intc" for S4 SoCs (S802X2, S905Y4, S805X2G, S905W2)
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- reg : Specifies base physical address and size of the registers.
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- interrupt-controller : Identifies the node as an interrupt controller.
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt source. The value must be 2.
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- meson,channel-interrupts: Array with the 8 upstream hwirq numbers. These
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are the hwirqs used on the parent interrupt controller.
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Example:
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gpio_interrupt: interrupt-controller@9880 {
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compatible = "amlogic,meson-gxbb-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x0 0x9880 0x0 0x10>;
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interrupt-controller;
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#interrupt-cells = <2>;
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meson,channel-interrupts = <64 65 66 67 68 69 70 71>;
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/amlogic,meson-gpio-intc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Amlogic Meson GPIO interrupt controller
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maintainers:
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- Heiner Kallweit <hkallweit1@gmail.com>
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description: |
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Meson SoCs contains an interrupt controller which is able to watch the SoC
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pads and generate an interrupt on edge or level. The controller is essentially
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a 256 pads to 8 or 12 GIC interrupt multiplexer, with a filter block to select
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edge or level and polarity. It does not expose all 256 mux inputs because the
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documentation shows that the upper part is not mapped to any pad. The actual
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number of interrupts exposed depends on the SoC.
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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properties:
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compatible:
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oneOf:
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- const: amlogic,meson-gpio-intc
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- items:
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- enum:
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- amlogic,meson8-gpio-intc
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- amlogic,meson8b-gpio-intc
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- amlogic,meson-gxbb-gpio-intc
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- amlogic,meson-gxl-gpio-intc
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- amlogic,meson-axg-gpio-intc
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- amlogic,meson-g12a-gpio-intc
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- amlogic,meson-sm1-gpio-intc
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- amlogic,meson-a1-gpio-intc
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- amlogic,meson-s4-gpio-intc
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- const: amlogic,meson-gpio-intc
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reg:
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maxItems: 1
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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amlogic,channel-interrupts:
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description: Array with the upstream hwirq numbers
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minItems: 8
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maxItems: 12
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$ref: /schemas/types.yaml#/definitions/uint32-array
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required:
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- compatible
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- reg
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- interrupt-controller
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- "#interrupt-cells"
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- amlogic,channel-interrupts
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additionalProperties: false
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examples:
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- |
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interrupt-controller@9880 {
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compatible = "amlogic,meson-gxbb-gpio-intc",
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"amlogic,meson-gpio-intc";
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reg = <0x9880 0x10>;
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interrupt-controller;
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#interrupt-cells = <2>;
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amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
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};
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