ASoC: core: Add new SOC_DOUBLE_SX_TLV macro
Currently macros only exist for SX style (implicit sign bit 2's compliment) volume controls where the volumes for left and right are in separate registers. Some future Cirrus devices will have both volumes in the same register, as such add a new macro to support this. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220621102041.1713504-4-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -136,6 +136,18 @@
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.put = snd_soc_put_volsw, \
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.private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \
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max, invert, 0) }
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#define SOC_DOUBLE_SX_TLV(xname, xreg, shift_left, shift_right, xmin, xmax, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
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.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
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SNDRV_CTL_ELEM_ACCESS_READWRITE, \
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.tlv.p = (tlv_array), \
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.info = snd_soc_info_volsw_sx, \
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.get = snd_soc_get_volsw_sx, \
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.put = snd_soc_put_volsw_sx, \
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.private_value = (unsigned long)&(struct soc_mixer_control) \
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{.reg = xreg, .rreg = xreg, \
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.shift = shift_left, .rshift = shift_right, \
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.max = xmax, .min = xmin} }
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#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
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{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
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.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
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