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clk: mediatek: Propagate struct device with mtk_clk_register_dividers()

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Propagate struct device for divider clocks registered through clk-mtk
helpers to be able to get runtime PM support for MTK clocks.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks
Link: https://lore.kernel.org/r/20230306140543.1813621-32-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
AngeloGioacchino Del Regno 2023-03-06 15:05:20 +01:00 committed by Stephen Boyd
parent 876d4e21aa
commit 6b7daeaa7e
4 changed files with 9 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/mediatek/clk-mt2701.c
View File

@ -681,7 +681,7 @@ static int mtk_topckgen_init(struct platform_device *pdev)
ARRAY_SIZE(top_muxes), base,
&mt2701_clk_lock, clk_data);
mtk_clk_register_dividers(top_adj_divs, ARRAY_SIZE(top_adj_divs),
mtk_clk_register_dividers(&pdev->dev, top_adj_divs, ARRAY_SIZE(top_adj_divs),
base, &mt2701_clk_lock, clk_data);
mtk_clk_register_gates(&pdev->dev, node, top_clks,

2
drivers/clk/mediatek/clk-mt8167-apmixedsys.c
View File

@ -109,7 +109,7 @@ static int clk_mt8167_apmixed_probe(struct platform_device *pdev)
if (ret)
return ret;
ret = mtk_clk_register_dividers(adj_divs, ARRAY_SIZE(adj_divs), base,
ret = mtk_clk_register_dividers(dev, adj_divs, ARRAY_SIZE(adj_divs), base,
&mt8167_apmixed_clk_lock, clk_data);
if (ret)
goto unregister_plls;

8
drivers/clk/mediatek/clk-mtk.c
View File

@ -393,7 +393,8 @@ void mtk_clk_unregister_composites(const struct mtk_composite *mcs, int num,
}
EXPORT_SYMBOL_GPL(mtk_clk_unregister_composites);
int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num,
int mtk_clk_register_dividers(struct device *dev,
const struct mtk_clk_divider *mcds, int num,
void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data)
{
@ -412,7 +413,7 @@ int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num,
continue;
}
hw = clk_hw_register_divider(NULL, mcd->name, mcd->parent_name,
hw = clk_hw_register_divider(dev, mcd->name, mcd->parent_name,
mcd->flags, base + mcd->div_reg, mcd->div_shift,
mcd->div_width, mcd->clk_divider_flags, lock);
@ -535,7 +536,8 @@ static int __mtk_clk_simple_probe(struct platform_device *pdev,
}
if (mcd->divider_clks) {
r = mtk_clk_register_dividers(mcd->divider_clks,
r = mtk_clk_register_dividers(&pdev->dev,
mcd->divider_clks,
mcd->num_divider_clks,
base, mcd->clk_lock, clk_data);
if (r)

3
drivers/clk/mediatek/clk-mtk.h
View File

@ -202,7 +202,8 @@ struct mtk_clk_divider {
.div_width = _width, \
}
int mtk_clk_register_dividers(const struct mtk_clk_divider *mcds, int num,
int mtk_clk_register_dividers(struct device *dev,
const struct mtk_clk_divider *mcds, int num,
void __iomem *base, spinlock_t *lock,
struct clk_hw_onecell_data *clk_data);
void mtk_clk_unregister_dividers(const struct mtk_clk_divider *mcds, int num,