ASoC: cs42l42: Use maple tree register cache

The cs42l42 can only support single register read and write operations
so does not benefit from block writes. This means it gets no benefit from
using the rbtree register cache over the maple tree register cache so
convert it to use maple trees instead, it is more modern.

Acked-by: David Rhodes <david.rhodes@cirrus.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-6-b806c4cbd1d4@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Mark Brown 2023-06-10 14:56:26 +01:00
parent bb1bd25ad7
commit 6b7fed83c9
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@ -393,7 +393,7 @@ const struct regmap_config cs42l42_regmap = {
.max_register = CS42L42_MAX_REGISTER,
.reg_defaults = cs42l42_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(cs42l42_reg_defaults),
.cache_type = REGCACHE_RBTREE,
.cache_type = REGCACHE_MAPLE,
.use_single_read = true,
.use_single_write = true,