Merge patch series "scsi: arcmsr: support Areca ARC-1688 Raid controller"
Driver update from ching Huang <ching2048@areca.com.tw>. Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
commit
6bae38ddd3
@ -50,7 +50,7 @@ struct device_attribute;
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#define ARCMSR_MAX_OUTSTANDING_CMD 1024
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#define ARCMSR_DEFAULT_OUTSTANDING_CMD 128
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#define ARCMSR_MIN_OUTSTANDING_CMD 32
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#define ARCMSR_DRIVER_VERSION "v1.50.00.13-20230206"
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#define ARCMSR_DRIVER_VERSION "v1.51.00.14-20230915"
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#define ARCMSR_SCSI_INITIATOR_ID 255
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#define ARCMSR_MAX_XFER_SECTORS 512
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#define ARCMSR_MAX_XFER_SECTORS_B 4096
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@ -78,9 +78,13 @@ struct device_attribute;
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#ifndef PCI_DEVICE_ID_ARECA_1203
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#define PCI_DEVICE_ID_ARECA_1203 0x1203
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#endif
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#ifndef PCI_DEVICE_ID_ARECA_1883
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#define PCI_DEVICE_ID_ARECA_1883 0x1883
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#endif
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#ifndef PCI_DEVICE_ID_ARECA_1884
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#define PCI_DEVICE_ID_ARECA_1884 0x1884
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#endif
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#define PCI_DEVICE_ID_ARECA_1886_0 0x1886
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#define PCI_DEVICE_ID_ARECA_1886 0x188A
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#define ARCMSR_HOURS (1000 * 60 * 60 * 4)
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#define ARCMSR_MINUTES (1000 * 60 * 60)
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@ -818,6 +822,23 @@ typedef struct deliver_completeQ {
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uint16_t cmdLMID; // reserved (0)
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uint16_t cmdFlag2; // reserved (0)
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} DeliverQ, CompletionQ, *pDeliver_Q, *pCompletion_Q;
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#define ARCMSR_XOR_SEG_SIZE (1024 * 1024)
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struct HostRamBuf {
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uint32_t hrbSignature; // must be "HRBS"
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uint32_t hrbSize; // total sg size, be multiples of MB
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uint32_t hrbRes[2]; // reserved, must be set to 0
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};
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struct Xor_sg {
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dma_addr_t xorPhys;
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uint64_t xorBufLen;
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};
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struct XorHandle {
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dma_addr_t xorPhys;
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uint64_t xorBufLen;
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void *xorVirt;
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};
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/*
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*******************************************************************************
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** Adapter Control Block
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@ -929,6 +950,7 @@ struct AdapterControlBlock
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char firm_model[12];
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char firm_version[20];
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char device_map[20]; /*21,84-99*/
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uint32_t firm_PicStatus;
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struct work_struct arcmsr_do_message_isr_bh;
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struct timer_list eternal_timer;
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unsigned short fw_flag;
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@ -937,6 +959,7 @@ struct AdapterControlBlock
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#define FW_DEADLOCK 0x0010
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uint32_t maxOutstanding;
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int vector_count;
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int xor_mega;
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uint32_t maxFreeCCB;
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struct timer_list refresh_timer;
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uint32_t doneq_index;
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@ -946,6 +969,10 @@ struct AdapterControlBlock
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uint32_t completionQ_entry;
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pCompletion_Q pCompletionQ;
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uint32_t completeQ_size;
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void *xorVirt;
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dma_addr_t xorPhys;
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unsigned int init2cfg_size;
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unsigned int xorVirtOffset;
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};/* HW_DEVICE_EXTENSION */
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/*
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*******************************************************************************
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@ -214,8 +214,12 @@ static struct pci_device_id arcmsr_device_id_table[] = {
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.driver_data = ACB_ADAPTER_TYPE_A},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
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.driver_data = ACB_ADAPTER_TYPE_C},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1883),
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.driver_data = ACB_ADAPTER_TYPE_C},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
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.driver_data = ACB_ADAPTER_TYPE_E},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886_0),
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.driver_data = ACB_ADAPTER_TYPE_F},
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{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
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.driver_data = ACB_ADAPTER_TYPE_F},
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{0, 0}, /* Terminating entry */
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@ -747,6 +751,57 @@ static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
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return rtn;
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}
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static int arcmsr_alloc_xor_buffer(struct AdapterControlBlock *acb)
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{
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int rc = 0;
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struct pci_dev *pdev = acb->pdev;
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void *dma_coherent;
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dma_addr_t dma_coherent_handle;
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int i, xor_ram;
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struct Xor_sg *pXorPhys;
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void **pXorVirt;
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struct HostRamBuf *pRamBuf;
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// allocate 1 MB * N physically continuous memory for XOR engine.
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xor_ram = (acb->firm_PicStatus >> 24) & 0x0f;
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acb->xor_mega = (xor_ram - 1) * 32 + 128 + 3;
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acb->init2cfg_size = sizeof(struct HostRamBuf) +
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(sizeof(struct XorHandle) * acb->xor_mega);
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dma_coherent = dma_alloc_coherent(&pdev->dev, acb->init2cfg_size,
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&dma_coherent_handle, GFP_KERNEL);
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acb->xorVirt = dma_coherent;
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acb->xorPhys = dma_coherent_handle;
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pXorPhys = (struct Xor_sg *)((unsigned long)dma_coherent +
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sizeof(struct HostRamBuf));
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acb->xorVirtOffset = sizeof(struct HostRamBuf) +
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(sizeof(struct Xor_sg) * acb->xor_mega);
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pXorVirt = (void **)((unsigned long)dma_coherent +
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(unsigned long)acb->xorVirtOffset);
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for (i = 0; i < acb->xor_mega; i++) {
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dma_coherent = dma_alloc_coherent(&pdev->dev,
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ARCMSR_XOR_SEG_SIZE,
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&dma_coherent_handle, GFP_KERNEL);
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if (dma_coherent) {
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pXorPhys->xorPhys = dma_coherent_handle;
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pXorPhys->xorBufLen = ARCMSR_XOR_SEG_SIZE;
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*pXorVirt = dma_coherent;
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pXorPhys++;
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pXorVirt++;
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} else {
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pr_info("arcmsr%d: alloc max XOR buffer = 0x%x MB\n",
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acb->host->host_no, i);
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rc = -ENOMEM;
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break;
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}
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}
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pRamBuf = (struct HostRamBuf *)acb->xorVirt;
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pRamBuf->hrbSignature = 0x53425248; //HRBS
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pRamBuf->hrbSize = i * ARCMSR_XOR_SEG_SIZE;
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pRamBuf->hrbRes[0] = 0;
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pRamBuf->hrbRes[1] = 0;
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return rc;
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}
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static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
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{
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struct pci_dev *pdev = acb->pdev;
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@ -836,7 +891,11 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
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acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
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acb->doneq_index = 0;
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break;
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}
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}
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if ((acb->firm_PicStatus >> 24) & 0x0f) {
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if (arcmsr_alloc_xor_buffer(acb))
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return -ENOMEM;
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}
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return 0;
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}
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@ -2022,6 +2081,29 @@ static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
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static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
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{
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if (acb->xor_mega) {
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struct Xor_sg *pXorPhys;
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void **pXorVirt;
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int i;
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pXorPhys = (struct Xor_sg *)(acb->xorVirt +
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sizeof(struct HostRamBuf));
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pXorVirt = (void **)((unsigned long)acb->xorVirt +
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(unsigned long)acb->xorVirtOffset);
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for (i = 0; i < acb->xor_mega; i++) {
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if (pXorPhys->xorPhys) {
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dma_free_coherent(&acb->pdev->dev,
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ARCMSR_XOR_SEG_SIZE,
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*pXorVirt, pXorPhys->xorPhys);
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pXorPhys->xorPhys = 0;
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*pXorVirt = NULL;
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}
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pXorPhys++;
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pXorVirt++;
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}
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dma_free_coherent(&acb->pdev->dev, acb->init2cfg_size,
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acb->xorVirt, acb->xorPhys);
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}
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dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
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}
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@ -3309,6 +3391,10 @@ static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t
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pACB->firm_sdram_size = readl(&rwbuffer[3]);
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pACB->firm_hd_channels = readl(&rwbuffer[4]);
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pACB->firm_cfg_version = readl(&rwbuffer[25]);
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if (pACB->adapter_type == ACB_ADAPTER_TYPE_F)
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pACB->firm_PicStatus = readl(&rwbuffer[30]);
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else
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pACB->firm_PicStatus = 0;
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pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
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pACB->host->host_no,
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pACB->firm_model,
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@ -4096,6 +4182,12 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
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acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
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acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
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acb->msgcode_rwbuffer[7] = acb->completeQ_size;
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if (acb->xor_mega) {
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acb->msgcode_rwbuffer[8] = 0x455AA; //Linux init 2
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acb->msgcode_rwbuffer[9] = 0;
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acb->msgcode_rwbuffer[10] = lower_32_bits(acb->xorPhys);
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acb->msgcode_rwbuffer[11] = upper_32_bits(acb->xorPhys);
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}
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writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0);
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acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
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writel(acb->out_doorbell, ®->iobound_doorbell);
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@ -4706,9 +4798,11 @@ static const char *arcmsr_info(struct Scsi_Host *host)
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case PCI_DEVICE_ID_ARECA_1680:
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case PCI_DEVICE_ID_ARECA_1681:
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case PCI_DEVICE_ID_ARECA_1880:
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case PCI_DEVICE_ID_ARECA_1883:
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case PCI_DEVICE_ID_ARECA_1884:
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type = "SAS/SATA";
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break;
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case PCI_DEVICE_ID_ARECA_1886_0:
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case PCI_DEVICE_ID_ARECA_1886:
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type = "NVMe/SAS/SATA";
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break;
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