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ARM: dts: sun8i: Add NMI interrupt controller node

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The NMI interrupt controller is in charge of the NMI pin exposed by
the SoC to the PMIC. The PMIC signals interrupts through this.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai 2015-10-15 00:32:21 +08:00 committed by Maxime Ripard
parent d92ff4228c
commit 6c067963f6
1 changed files with 8 additions and 0 deletions
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8
arch/arm/boot/dts/sun8i-a23-a33.dtsi
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@ -579,6 +579,14 @@
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
}; };
nmi_intc: interrupt-controller@01f00c0c {
compatible = "allwinner,sun6i-a31-sc-nmi";
interrupt-controller;
#interrupt-cells = <2>;
reg = <0x01f00c0c 0x38>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
prcm@01f01400 { prcm@01f01400 {
compatible = "allwinner,sun8i-a23-prcm"; compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>; reg = <0x01f01400 0x200>;