PCI: pciehp: Remove struct controller.no_cmd_complete
"no_cmd_complete" is only used once, and it duplicates read-only information we already have in the cached Slot Capabilities value. Remove the field and use the existing macro NO_CMD_CMPL() instead. [bhelgaas: changelog] Signed-off-by: Rajat Jain <rajatxjain@gmail.com> Signed-off-by: Rajat Jain <rajatjain@juniper.net> Signed-off-by: Guenter Roeck <groeck@juniper.net> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -96,7 +96,6 @@ struct controller {
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struct timer_list poll_timer;
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struct timer_list poll_timer;
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unsigned long cmd_started; /* jiffies */
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unsigned long cmd_started; /* jiffies */
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unsigned int cmd_busy:1;
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unsigned int cmd_busy:1;
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unsigned int no_cmd_complete:1;
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unsigned int link_active_reporting:1;
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unsigned int link_active_reporting:1;
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unsigned int notification_enabled:1;
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unsigned int notification_enabled:1;
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unsigned int power_fault_detected;
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unsigned int power_fault_detected;
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@ -140,7 +140,7 @@ static void pcie_wait_cmd(struct controller *ctrl)
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* If the controller does not generate notifications for command
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* If the controller does not generate notifications for command
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* completions, we never need to wait between writes.
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* completions, we never need to wait between writes.
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*/
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*/
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if (ctrl->no_cmd_complete)
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if (NO_CMD_CMPL(ctrl))
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return;
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return;
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if (!ctrl->cmd_busy)
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if (!ctrl->cmd_busy)
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@ -772,15 +772,6 @@ struct controller *pcie_init(struct pcie_device *dev)
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init_waitqueue_head(&ctrl->queue);
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init_waitqueue_head(&ctrl->queue);
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dbg_ctrl(ctrl);
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dbg_ctrl(ctrl);
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/*
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* Controller doesn't notify of command completion if the "No
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* Command Completed Support" bit is set in Slot Capabilities.
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* If set, it means the controller can accept hotplug commands
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* with no delay between them.
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*/
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if (NO_CMD_CMPL(ctrl))
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ctrl->no_cmd_complete = 1;
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/* Check if Data Link Layer Link Active Reporting is implemented */
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/* Check if Data Link Layer Link Active Reporting is implemented */
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pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
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pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
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if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {
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if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {
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