soc: devicetree updates for 6.10, part 1

The updates this time are a bit smaller than most times, mainly because
 it is not totally dominated by new Qualcomm hardware support. Instead,
 we larger than average updates for Rockchips, NXP, Allwinner and TI.
 The only two new SoCs this time are both from NXP and are minor variants
 of already supported ones.
 
 The updates for aspeed, amlogic and mediatek came a little late, so
 I'm saving those for part 2 in a few days if everything turns out fine.
 
 New machines this time contain:
 
  - two Broadcom SoC based wireless routers from Asus
 
  - Five allwinner based consumer devices for gaming, set-top-box and
    eboot reader applications
 
  - Three older phones based on Qualcomm chips, plus the more recent
    Sony Xperia 1 V
 
  - 14 industrial and embedded boards based on NXP i.MX6, i.MX8,
    layerscape and s32g3 SoCs
 
  - six rockchips boards including another handheld game console
    and a few single-board computers
 
 On top of these, we have the usual cleanups for dtc warnings and
 updates to add more features to already merged machines.
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Merge tag 'soc-dt-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "The updates this time are a bit smaller than most times, mainly
  because it is not totally dominated by new Qualcomm hardware support.

  Instead, we larger than average updates for Rockchips, NXP, Allwinner
  and TI. The only two new SoCs this time are both from NXP and are
  minor variants of already supported ones.

  The updates for aspeed, amlogic and mediatek came a little late, so
  I'm saving those for part 2 in a few days if everything turns out
  fine.

  New machines this time contain:

   - two Broadcom SoC based wireless routers from Asus

   - Five allwinner based consumer devices for gaming, set-top-box and
     eboot reader applications

   - Three older phones based on Qualcomm chips, plus the more recent
     Sony Xperia 1 V

   - 14 industrial and embedded boards based on NXP i.MX6, i.MX8,
     layerscape and s32g3 SoCs

   - six rockchips boards including another handheld game console and a
     few single-board computers

  On top of these, we have the usual cleanups for dtc warnings and
  updates to add more features to already merged machines"

* tag 'soc-dt-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (612 commits)
  arm64: dts: marvell: espressobin-ultra: fix Ethernet Switch unit address
  arm64: dts: marvell: turris-mox: drop unneeded flash address/size-cells
  arm64: dts: marvell: eDPU: drop redundant address/size-cells
  arm64: dts: qcom: pm6150: correct USB VBUS regulator compatible
  arm64: dts: rockchip: add rk3588 pcie and php IOMMUs
  arm64: dts: rockchip: enable onboard spi flash for rock-3a
  arm64: dts: rockchip: add USB-C support to rk3588s-orangepi-5
  arm64: dts: rockchip: Enable GPU on Orange Pi 5
  arm64: dts: rockchip: enable GPU on khadas-edge2
  arm64: dts: rockchip: Add USB3 on Edgeble NCM6A-IO board
  arm64: dts: rockchip: Support poweroff on Edgeble Neural Compute Module
  arm64: dts: rockchip: Add Radxa ROCK 3C
  dt-bindings: arm: rockchip: add Radxa ROCK 3C
  arm64: dts: exynos: gs101: specify empty clocks for remaining pinctrl
  arm64: dts: exynos: gs101: specify bus clock for pinctrl_hsi2
  arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
  arm64: dts: exynos: gs101: specify bus clock for pinctrl (far) alive
  arm64: dts: Add/fix /memory node unit-addresses
  arm64: dts: qcom: qcs404: fix bluetooth device address
  arm64: dts: qcom: sc8280xp-x13s: enable USB MP and fingerprint reader
  ...
This commit is contained in:
Linus Torvalds 2024-05-13 08:45:18 -07:00
commit 6c60000f0b
565 changed files with 23910 additions and 5103 deletions

View File

@ -53,6 +53,7 @@ properties:
- description: BCM4709 based boards
items:
- enum:
- asus,rt-ac3200
- asus,rt-ac87u
- buffalo,wxr-1900dhp
- linksys,ea9200
@ -67,6 +68,7 @@ properties:
items:
- enum:
- asus,rt-ac3100
- asus,rt-ac5300
- asus,rt-ac88u
- dlink,dir-885l
- dlink,dir-890l

View File

@ -46,6 +46,30 @@ properties:
- compatible
- "#clock-cells"
gpio:
type: object
additionalProperties: false
properties:
compatible:
const: raspberrypi,firmware-gpio
gpio-controller: true
"#gpio-cells":
const: 2
description:
The first cell is the pin number, and the second cell is used to
specify the gpio polarity (GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW).
gpio-line-names:
minItems: 8
required:
- compatible
- gpio-controller
- "#gpio-cells"
reset:
type: object
additionalProperties: false
@ -96,6 +120,12 @@ examples:
#clock-cells = <1>;
};
expgpio: gpio {
compatible = "raspberrypi,firmware-gpio";
gpio-controller;
#gpio-cells = <2>;
};
reset: reset {
compatible = "raspberrypi,firmware-reset";
#reset-cells = <1>;

View File

@ -813,6 +813,14 @@ properties:
- const: tq,imx6ull-tqma6ull2l # MCIMX6Y2, LGA SoM variant
- const: fsl,imx6ull
- description: Seeed Stuido i.MX6ULL SoM on dev boards
items:
- enum:
- seeed,imx6ull-seeed-npi-emmc
- seeed,imx6ull-seeed-npi-nand
- const: seeed,imx6ull-seeed-npi
- const: fsl,imx6ull
- description: i.MX6ULZ based Boards
items:
- enum:
@ -1050,6 +1058,7 @@ properties:
- enum:
- beacon,imx8mp-beacon-kit # i.MX8MP Beacon Development Kit
- dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC
- emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit
- fsl,imx8mp-evk # i.MX8MP EVK Board
- gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
@ -1218,7 +1227,6 @@ properties:
- enum:
- einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board
- fsl,imx8qxp-mek # i.MX8QXP MEK Board
- toradex,colibri-imx8x # Colibri iMX8X Modules
- const: fsl,imx8qxp
- description: i.MX8DXL based Boards
@ -1227,7 +1235,7 @@ properties:
- fsl,imx8dxl-evk # i.MX8DXL EVK Board
- const: fsl,imx8dxl
- description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules
- description: i.MX8QXP/i.MX8DX Boards with Toradex Colibri iMX8X Modules
items:
- enum:
- toradex,colibri-imx8x-aster # Colibri iMX8X Module on Aster Board
@ -1235,7 +1243,9 @@ properties:
- toradex,colibri-imx8x-iris # Colibri iMX8X Module on Iris Board
- toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2
- const: toradex,colibri-imx8x
- const: fsl,imx8qxp
- enum:
- fsl,imx8qxp
- fsl,imx8dx
- description:
TQMa8Xx is a series of SOM featuring NXP i.MX8X system-on-chip
@ -1536,6 +1546,12 @@ properties:
- nxp,s32g274a-rdb2
- const: nxp,s32g2
- description: S32G3 based Boards
items:
- enum:
- nxp,s32g399a-rdb3
- const: nxp,s32g3
- description: S32V234 based Boards
items:
- enum:

View File

@ -61,10 +61,6 @@ properties:
mboxes:
minItems: 2
ti,system-reboot-controller:
description: Determines If system reboot can be triggered by SoC reboot
type: boolean
ti,host-id:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
@ -94,7 +90,6 @@ examples:
- |
pmmc: system-controller@2921800 {
compatible = "ti,k2g-sci";
ti,system-reboot-controller;
mbox-names = "rx", "tx";
mboxes = <&msgmgr 5 2>,
<&msgmgr 0 0>;

View File

@ -137,6 +137,7 @@ properties:
- microsoft,dempsey
- microsoft,makepeace
- microsoft,moneypenny
- motorola,falcon
- samsung,s3ve3g
- const: qcom,msm8226
@ -184,13 +185,16 @@ properties:
- oneplus,bacon
- samsung,klte
- sony,xperia-castor
- sony,xperia-leo
- const: qcom,msm8974pro
- const: qcom,msm8974
- items:
- const: qcom,msm8916-mtp
- const: qcom,msm8916-mtp/1
- const: qcom,msm8916
- enum:
- samsung,kltechn
- const: samsung,klte
- const: qcom,msm8974pro
- const: qcom,msm8974
- items:
- enum:
@ -200,6 +204,8 @@ properties:
- gplus,fl8005a
- huawei,g7
- longcheer,l8910
- longcheer,l8150
- qcom,msm8916-mtp
- samsung,a3u-eur
- samsung,a5u-eur
- samsung,e5
@ -220,11 +226,6 @@ properties:
- yiming,uz801-v3
- const: qcom,msm8916
- items:
- const: longcheer,l8150
- const: qcom,msm8916-v1-qrd/9-v1
- const: qcom,msm8916
- items:
- enum:
- motorola,potter
@ -1003,6 +1004,7 @@ properties:
- qcom,sm8550-hdk
- qcom,sm8550-mtp
- qcom,sm8550-qrd
- sony,pdx234
- const: qcom,sm8550
- items:

View File

@ -49,6 +49,11 @@ properties:
- anbernic,rg-arc-s
- const: rockchip,rk3566
- description: ArmSoM Sige7 board
items:
- const: armsom,sige7
- const: rockchip,rk3588
- description: Asus Tinker board
items:
- const: asus,rk3288-tinker
@ -198,6 +203,13 @@ properties:
- const: firefly,rk3568-roc-pc
- const: rockchip,rk3568
- description: Forlinx FET3588-C SoM
items:
- enum:
- forlinx,ok3588-c
- const: forlinx,fet3588-c
- const: rockchip,rk3588
- description: FriendlyElec NanoPi R2 series boards
items:
- enum:
@ -236,6 +248,11 @@ properties:
- const: friendlyarm,nanopc-t6
- const: rockchip,rk3588
- description: GameForce Chi
items:
- const: gameforce,chi
- const: rockchip,rk3326
- description: GeekBuying GeekBox
items:
- const: geekbuying,geekbox
@ -631,7 +648,7 @@ properties:
- const: phytec,rk3288-phycore-som
- const: rockchip,rk3288
- description: Pine64 PinebookPro
- description: Pine64 Pinebook Pro
items:
- const: pine64,pinebook-pro
- const: rockchip,rk3399
@ -644,7 +661,7 @@ properties:
- const: pine64,pinenote
- const: rockchip,rk3566
- description: Pine64 PinePhonePro
- description: Pine64 PinePhone Pro
items:
- const: pine64,pinephone-pro
- const: rockchip,rk3399
@ -682,7 +699,7 @@ properties:
- const: pine64,quartzpro64
- const: rockchip,rk3588
- description: Pine64 SoQuartz SoM
- description: Pine64 SOQuartz
items:
- enum:
- pine64,soquartz-blade
@ -700,12 +717,17 @@ properties:
- powkiddy,x55
- const: rockchip,rk3566
- description: Protonic MECSBC board
items:
- const: prt,mecsbc
- const: rockchip,rk3568
- description: QNAP TS-433-4G 4-Bay NAS
items:
- const: qnap,ts433
- const: rockchip,rk3568
- description: Radxa Compute Module 3(CM3)
- description: Radxa Compute Module 3 (CM3)
items:
- enum:
- radxa,cm3-io
@ -767,22 +789,27 @@ properties:
- const: radxa,rockpis
- const: rockchip,rk3308
- description: Radxa Rock2 Square
- description: Radxa Rock 2 Square
items:
- const: radxa,rock2-square
- const: rockchip,rk3288
- description: Radxa ROCK3 Model A
- description: Radxa ROCK 3A
items:
- const: radxa,rock3a
- const: rockchip,rk3568
- description: Radxa ROCK 5 Model A
- description: Radxa ROCK 3C
items:
- const: radxa,rock-3c
- const: rockchip,rk3566
- description: Radxa ROCK 5A
items:
- const: radxa,rock-5a
- const: rockchip,rk3588s
- description: Radxa ROCK 5 Model B
- description: Radxa ROCK 5B
items:
- const: radxa,rock-5b
- const: rockchip,rk3588
@ -927,6 +954,11 @@ properties:
- const: turing,rk1
- const: rockchip,rk3588
- description: WolfVision PF5 mainboard
items:
- const: wolfvision,rk3568-pf5
- const: rockchip,rk3568
- description: Xunlong Orange Pi 5 Plus
items:
- const: xunlong,orangepi-5-plus

View File

@ -56,6 +56,21 @@ properties:
- const: anbernic,rg-nano
- const: allwinner,sun8i-v3s
- description: Anbernic RG35XX (2024)
- items:
- const: anbernic,rg35xx-2024
- const: allwinner,sun50i-h700
- description: Anbernic RG35XX Plus
- items:
- const: anbernic,rg35xx-plus
- const: allwinner,sun50i-h700
- description: Anbernic RG35XX H
- items:
- const: anbernic,rg35xx-h
- const: allwinner,sun50i-h700
- description: Amarula A64 Relic
items:
- const: amarula,a64-relic
@ -774,6 +789,11 @@ properties:
- const: pocketbook,touch-lux-3
- const: allwinner,sun5i-a13
- description: PocketBook 614 Plus
items:
- const: pocketbook,614-plus
- const: allwinner,sun5i-a13
- description: Point of View Protab2-IPS9
items:
- const: pov,protab2-ips9
@ -860,6 +880,11 @@ properties:
- const: allwinner,sl631
- const: allwinner,sun8i-v3
- description: Tanix TX1
items:
- const: oranth,tanix-tx1
- const: allwinner,sun50i-h616
- description: Tanix TX6
items:
- const: oranth,tanix-tx6

View File

@ -30,16 +30,18 @@ properties:
- google,gs101-cmu-top
- google,gs101-cmu-apm
- google,gs101-cmu-misc
- google,gs101-cmu-hsi0
- google,gs101-cmu-hsi2
- google,gs101-cmu-peric0
- google,gs101-cmu-peric1
clocks:
minItems: 1
maxItems: 3
maxItems: 5
clock-names:
minItems: 1
maxItems: 3
maxItems: 5
"#clock-cells":
const: 1
@ -72,6 +74,55 @@ allOf:
items:
- const: oscclk
- if:
properties:
compatible:
contains:
const: google,gs101-cmu-hsi0
then:
properties:
clocks:
items:
- description: External reference clock (24.576 MHz)
- description: HSI0 bus clock (from CMU_TOP)
- description: DPGTC (from CMU_TOP)
- description: USB DRD controller clock (from CMU_TOP)
- description: USB Display Port debug clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: bus
- const: dpgtc
- const: usb31drd
- const: usbdpdbg
- if:
properties:
compatible:
contains:
enum:
- google,gs101-cmu-hsi2
then:
properties:
clocks:
items:
- description: External reference clock (24.576 MHz)
- description: High Speed Interface bus clock (from CMU_TOP)
- description: High Speed Interface pcie clock (from CMU_TOP)
- description: High Speed Interface ufs clock (from CMU_TOP)
- description: High Speed Interface mmc clock (from CMU_TOP)
clock-names:
items:
- const: oscclk
- const: bus
- const: pcie
- const: ufs
- const: mmc
- if:
properties:
compatible:

View File

@ -348,15 +348,6 @@ properties:
# Yes Optoelectronics YTC700TLAG-05-201C 7" TFT LCD panel
- yes-optoelectronics,ytc700tlag-05-201c
backlight: true
ddc-i2c-bus: true
enable-gpios: true
port: true
power-supply: true
no-hpd: true
hpd-gpios: true
data-mapping: true
if:
not:
properties:
@ -367,7 +358,7 @@ then:
properties:
data-mapping: false
additionalProperties: false
unevaluatedProperties: false
required:
- compatible

View File

@ -177,6 +177,15 @@ allOf:
required:
- reg-names
- if:
properties:
compatible:
contains:
enum:
- nvidia,tegra194-host1x
then:
properties:
dma-coherent: true
- if:
properties:
compatible:
@ -226,6 +235,8 @@ allOf:
use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to
usable stream IDs.
dma-coherent: true
required:
- reg-names

View File

@ -1,30 +0,0 @@
Raspberry Pi GPIO expander
The Raspberry Pi 3 GPIO expander is controlled by the VC4 firmware. The
firmware exposes a mailbox interface that allows the ARM core to control the
GPIO lines on the expander.
The Raspberry Pi GPIO expander node must be a child node of the Raspberry Pi
firmware node.
Required properties:
- compatible : Should be "raspberrypi,firmware-gpio"
- gpio-controller : Marks the device node as a gpio controller
- #gpio-cells : Should be two. The first cell is the pin number, and
the second cell is used to specify the gpio polarity:
0 = active high
1 = active low
Example:
firmware: firmware-rpi {
compatible = "raspberrypi,bcm2835-firmware";
mboxes = <&mailbox>;
expgpio: gpio {
compatible = "raspberrypi,firmware-gpio";
gpio-controller;
#gpio-cells = <2>;
};
};

View File

@ -30,6 +30,10 @@ properties:
clocks:
maxItems: 1
access-controllers:
minItems: 1
maxItems: 2
required:
- compatible
- reg

View File

@ -58,20 +58,6 @@ patternProperties:
required:
- compatible
allOf:
- if:
not:
properties:
compatible:
contains:
enum:
- qcom,sm8450-pmic-glink
- qcom,sm8550-pmic-glink
- qcom,x1e80100-pmic-glink
then:
properties:
orientation-gpios: false
additionalProperties: false
examples:

View File

@ -0,0 +1,51 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g057-sys.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/V2H(P) System Controller (SYS)
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>
description: |
The RZ/V2H(P) SYS (System Controller) controls the overall
configuration of the LSI and supports the following functions,
- Trust zone control
- Extend access by specific masters to address beyond 4GB space
- GBETH configuration
- Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
- LSI version
- WDT stop control
- General registers
properties:
compatible:
const: renesas,r9a09g057-sys
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
required:
- compatible
- reg
- clocks
- resets
additionalProperties: false
examples:
- |
sys: system-controller@10430000 {
compatible = "renesas,r9a09g057-sys";
reg = <0x10430000 0x10000>;
clocks = <&cpg 1>;
resets = <&cpg 1>;
};

View File

@ -513,6 +513,14 @@ properties:
- renesas,rzv2mevk2 # RZ/V2M Eval Board v2.0
- const: renesas,r9a09g011
- description: RZ/V2H(P) (R9A09G057)
items:
- enum:
- renesas,r9a09g057h41 # RZ/V2H
- renesas,r9a09g057h42 # RZ/V2H with Mali-G31 support
- renesas,r9a09g057h44 # RZ/V2HP with Mali-G31 + Mali-C55 support
- const: renesas,r9a09g057
additionalProperties: true
...

View File

@ -15,6 +15,7 @@ properties:
- items:
- enum:
- google,gs101-apm-sysreg
- google,gs101-hsi2-sysreg
- google,gs101-peric0-sysreg
- google,gs101-peric1-sysreg
- samsung,exynos3-sysreg
@ -72,6 +73,7 @@ allOf:
compatible:
contains:
enum:
- google,gs101-hsi2-sysreg
- google,gs101-peric0-sysreg
- google,gs101-peric1-sysreg
- samsung,exynos850-cmgp-sysreg

View File

@ -33,6 +33,7 @@ properties:
- fsl,imx7ulp-usbmisc
- fsl,imx8mm-usbmisc
- fsl,imx8mn-usbmisc
- fsl,imx8ulp-usbmisc
- const: fsl,imx7d-usbmisc
- const: fsl,imx6q-usbmisc
- items:

View File

@ -151,6 +151,8 @@ patternProperties:
description: ARM Ltd.
"^armadeus,.*":
description: ARMadeus Systems SARL
"^armsom,.*":
description: ArmSoM Technology Co., Ltd.
"^arrow,.*":
description: Arrow Electronics
"^artesyn,.*":
@ -438,6 +440,8 @@ patternProperties:
description: Dongguan EmbedFire Electronic Technology Co., Ltd.
"^embest,.*":
description: Shenzhen Embest Technology Co., Ltd.
"^emcraft,.*":
description: Emcraft Systems
"^emlid,.*":
description: Emlid, Ltd.
"^emmicro,.*":
@ -1627,6 +1631,8 @@ patternProperties:
description: Wondermedia Technologies, Inc.
"^wobo,.*":
description: Wobo
"^wolfvision,.*":
description: WolfVision GmbH
"^x-powers,.*":
description: X-Powers
"^xen,.*":

View File

@ -61,6 +61,7 @@ dtb-$(CONFIG_MACH_SUN5I) += \
sun5i-a13-olinuxino.dtb \
sun5i-a13-olinuxino-micro.dtb \
sun5i-a13-pocketbook-touch-lux-3.dtb \
sun5i-a13-pocketbook-614-plus.dtb \
sun5i-a13-q8-tablet.dtb \
sun5i-a13-utoo-p66.dtb \
sun5i-gr8-chip-pro.dtb \

View File

@ -0,0 +1,218 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 Denis Burkov <hitechshell@mail.ru>
*/
/dts-v1/;
#include "sun5i-a13.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/common.h>
/ {
model = "PocketBook 614 Plus";
compatible = "pocketbook,614-plus", "allwinner,sun5i-a13";
aliases {
serial0 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_POWER;
linux,default-trigger = "default-on";
gpios = <&pio 4 8 GPIO_ACTIVE_LOW>; /* PE8 */
};
};
gpio-keys {
compatible = "gpio-keys";
key-0 {
label = "Right";
linux,code = <KEY_NEXT>;
gpios = <&pio 6 9 GPIO_ACTIVE_LOW>; /* PG9 */
};
key-1 {
label = "Left";
linux,code = <KEY_PREVIOUS>;
gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
};
};
reg_3v3_mmc0: regulator-mmc0 {
compatible = "regulator-fixed";
regulator-name = "vdd-mmc0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&pio 4 4 GPIO_ACTIVE_LOW>; /* PE4 */
vin-supply = <&reg_vcc3v3>;
};
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&ehci0 {
status = "okay";
};
&i2c0 {
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp209";
reg = <0x34>;
interrupts = <0>;
};
};
#include "axp209.dtsi"
&i2c1 {
status = "okay";
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
#clock-cells = <0>;
};
};
&lradc {
vref-supply = <&reg_ldo2>;
status = "okay";
button-300 {
label = "Down";
linux,code = <KEY_DOWN>;
channel = <0>;
voltage = <300000>;
};
button-700 {
label = "Up";
linux,code = <KEY_UP>;
channel = <0>;
voltage = <700000>;
};
button-1000 {
label = "Left";
linux,code = <KEY_LEFT>;
channel = <0>;
voltage = <1000000>;
};
button-1200 {
label = "Menu";
linux,code = <KEY_MENU>;
channel = <0>;
voltage = <1200000>;
};
button-1500 {
label = "Right";
linux,code = <KEY_RIGHT>;
channel = <0>;
voltage = <1500000>;
};
};
&mmc0 {
vmmc-supply = <&reg_3v3_mmc0>;
bus-width = <4>;
cd-gpios = <&pio 6 0 GPIO_ACTIVE_LOW>; /* PG0 */
status = "okay";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pc_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
status = "okay";
};
&ohci0 {
status = "okay";
};
&otg_sram {
status = "okay";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vdd-cpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-int-dll";
};
&reg_ldo1 {
regulator-name = "vdd-rtc";
};
&reg_ldo2 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_usb0_vbus {
status = "okay";
gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
};
&reg_usb1_vbus {
gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
&usbphy {
usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
usb0_vbus_det-gpios = <&axp_gpio 1 GPIO_ACTIVE_HIGH>;
usb0_vbus-supply = <&reg_usb0_vbus>;
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};

View File

@ -62,14 +62,14 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;

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@ -77,7 +77,7 @@
};
};
mmc0_pwrseq: mmc0_pwrseq {
mmc0_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; /* PB10 */
};

View File

@ -77,7 +77,7 @@
};
};
mmc0_pwrseq: mmc0_pwrseq {
mmc0_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
};

View File

@ -109,7 +109,7 @@
};
};
reg_vga_3v3: vga_3v3_regulator {
reg_vga_3v3: vga-3v3-regulator {
compatible = "regulator-fixed";
regulator-name = "vga-3v3";
regulator-min-microvolt = <3300000>;
@ -119,7 +119,7 @@
gpio = <&pio 7 25 GPIO_ACTIVE_HIGH>; /* PH25 */
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 */
};

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@ -179,14 +179,14 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;
@ -1318,7 +1318,7 @@
compatible = "allwinner,sun6i-a31-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
ar100: ar100-clk {
compatible = "allwinner,sun6i-a31-ar100-clk";
#clock-cells = <0>;
clocks = <&rtc CLK_OSC32K>, <&osc24M>,
@ -1327,7 +1327,7 @@
clock-output-names = "ar100";
};
ahb0: ahb0_clk {
ahb0: ahb0-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@ -1336,14 +1336,14 @@
clock-output-names = "ahb0";
};
apb0: apb0_clk {
apb0: apb0-clk {
compatible = "allwinner,sun6i-a31-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
apb0_gates: apb0-gates-clk {
compatible = "allwinner,sun6i-a31-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
@ -1353,14 +1353,14 @@
"apb0_i2c";
};
ir_clk: ir_clk {
ir_clk: ir-clk {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-mod0-clk";
clocks = <&rtc CLK_OSC32K>, <&osc24M>;
clock-output-names = "ir";
};
apb0_rst: apb0_rst {
apb0_rst: apb0-rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};

View File

@ -75,7 +75,7 @@
};
};
mmc2_pwrseq: mmc2_pwrseq {
mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 8 GPIO_ACTIVE_LOW>; /* PL8 WIFI_EN */
};

View File

@ -86,7 +86,7 @@
};
};
mmc3_pwrseq: mmc3_pwrseq {
mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 22 GPIO_ACTIVE_LOW>; /* PH22 WL-PMU-EN */
};

View File

@ -96,7 +96,7 @@
};
};
mmc3_pwrseq: mmc3_pwrseq {
mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
clocks = <&ccu CLK_OUT_A>;

View File

@ -65,7 +65,7 @@
stdout-path = "serial0:115200n8";
};
reg_mmc3_vdd: mmc3_vdd {
reg_mmc3_vdd: regulator-mmc3-vdd {
compatible = "regulator-fixed";
regulator-name = "mmc3_vdd";
regulator-min-microvolt = <3000000>;
@ -74,7 +74,7 @@
gpio = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
};
reg_gmac_vdd: gmac_vdd {
reg_gmac_vdd: regulator-gmac-vdd {
compatible = "regulator-fixed";
regulator-name = "gmac_vdd";
regulator-min-microvolt = <3000000>;

View File

@ -14,7 +14,7 @@
model = "Olimex A20-Olimex-SOM-EVB-eMMC";
compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: mmc2_pwrseq {
mmc2_pwrseq: pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
};

View File

@ -13,7 +13,7 @@
model = "Olimex A20-SOM204-EVB-eMMC";
compatible = "olimex,a20-olimex-som204-evb-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: mmc2_pwrseq {
mmc2_pwrseq: pwrseq-1 {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 16 GPIO_ACTIVE_LOW>;
};

View File

@ -65,7 +65,7 @@
};
};
rtl_pwrseq: rtl_pwrseq {
rtl_pwrseq: pwrseq-0 {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 9 GPIO_ACTIVE_LOW>;
};
@ -177,7 +177,7 @@
non-removable;
status = "okay";
rtl8723bs: sdio_wifi@1 {
rtl8723bs: wifi@1 {
reg = <1>;
};
};

View File

@ -82,7 +82,7 @@
};
};
reg_axp_ipsout: axp_ipsout {
reg_axp_ipsout: regulator-axp-ipsout {
compatible = "regulator-fixed";
regulator-name = "axp-ipsout";
regulator-min-microvolt = <5000000>;

View File

@ -60,7 +60,7 @@
stdout-path = "serial0:115200n8";
};
mmc3_pwrseq: mmc3_pwrseq {
mmc3_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
};

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@ -153,14 +153,14 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <100000>;
hysteresis = <2000>;

View File

@ -108,7 +108,7 @@
#size-cells = <1>;
ranges;
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@ -116,7 +116,7 @@
clock-output-names = "osc24M";
};
ext_osc32k: ext_osc32k_clk {
ext_osc32k: ext-osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
@ -733,7 +733,7 @@
compatible = "allwinner,sun8i-a23-prcm";
reg = <0x01f01400 0x200>;
ar100: ar100_clk {
ar100: ar100-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@ -742,7 +742,7 @@
clock-output-names = "ar100";
};
ahb0: ahb0_clk {
ahb0: ahb0-clk {
compatible = "fixed-factor-clock";
#clock-cells = <0>;
clock-div = <1>;
@ -751,14 +751,14 @@
clock-output-names = "ahb0";
};
apb0: apb0_clk {
apb0: apb0-clk {
compatible = "allwinner,sun8i-a23-apb0-clk";
#clock-cells = <0>;
clocks = <&ahb0>;
clock-output-names = "apb0";
};
apb0_gates: apb0_gates_clk {
apb0_gates: apb0-gates-clk {
compatible = "allwinner,sun8i-a23-apb0-gates-clk";
#clock-cells = <1>;
clocks = <&apb0>;
@ -767,7 +767,7 @@
"apb0_i2c";
};
apb0_rst: apb0_rst {
apb0_rst: apb0-rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
};

View File

@ -52,7 +52,7 @@
ethernet0 = &esp8089;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* The esp8089 needs 200 ms after driving wifi-en high */
@ -76,7 +76,7 @@
non-removable;
status = "okay";
esp8089: sdio_wifi@1 {
esp8089: wifi@1 {
compatible = "esp,esp8089";
reg = <1>;
esp,crystal-26M-en = <2>;

View File

@ -52,7 +52,7 @@
ethernet0 = &esp8089;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
/* The esp8089 needs 200 ms after driving wifi-en high */
@ -69,7 +69,7 @@
non-removable;
status = "okay";
esp8089: sdio_wifi@1 {
esp8089: wifi@1 {
compatible = "esp,esp8089";
reg = <1>;
esp,crystal-26M-en = <2>;

View File

@ -85,7 +85,7 @@
non-removable;
status = "okay";
rtl8703as: sdio_wifi@1 {
rtl8703as: wifi@1 {
reg = <1>;
};
};

View File

@ -78,7 +78,7 @@
non-removable;
status = "okay";
rtl8723bs: sdio_wifi@1 {
rtl8723bs: wifi@1 {
reg = <1>;
};
};

View File

@ -323,35 +323,35 @@
};
trips {
cpu_alert0: cpu_alert0 {
cpu_alert0: cpu-alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
gpu_alert0: gpu_alert0 {
gpu_alert0: gpu-alert0 {
/* milliCelsius */
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
cpu_alert1: cpu-alert1 {
/* milliCelsius */
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
gpu_alert1: gpu_alert1 {
gpu_alert1: gpu-alert1 {
/* milliCelsius */
temperature = <95000>;
hysteresis = <2000>;
type = "hot";
};
cpu_crit: cpu_crit {
cpu_crit: cpu-crit {
/* milliCelsius */
temperature = <110000>;
hysteresis = <2000>;

View File

@ -95,7 +95,7 @@
gpio = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";

View File

@ -144,7 +144,7 @@
compatible = "linux,spdif-dit";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&ac100_rtc 1>;
clock-names = "ext_clock";

View File

@ -123,7 +123,7 @@
vin-supply = <&reg_vbat>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */

View File

@ -164,7 +164,7 @@
ranges;
/* TODO: PRCM block has a mux for this. */
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@ -177,14 +177,14 @@
* It is an internal RC-based oscillator.
* TODO: Its controls are in the PRCM block.
*/
osc16M: osc16M_clk {
osc16M: osc16M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <16000000>;
clock-output-names = "osc16M";
};
osc16Md512: osc16Md512_clk {
osc16Md512: osc16Md512-clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <512>;
@ -1127,7 +1127,7 @@
#reset-cells = <1>;
};
r_cpucfg@1f01c00 {
cpucfg@1f01c00 {
compatible = "allwinner,sun8i-a83t-r-cpucfg";
reg = <0x1f01c00 0x400>;
};

View File

@ -103,7 +103,7 @@
cpu-supply = <&reg_vcc1v2>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;

View File

@ -43,11 +43,12 @@
/* Orange Pi R1 is based on Orange Pi Zero design */
#include "sun8i-h2-plus-orangepi-zero.dts"
/delete-node/ &reg_vcc_wifi;
/ {
model = "Xunlong Orange Pi R1";
compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus";
/delete-node/ reg_vcc_wifi;
/*
* Ths pin of this regulator is the same with the Wi-Fi extra
@ -89,7 +90,7 @@
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
rtl8189etv: sdio_wifi@1 {
rtl8189etv: wifi@1 {
reg = <1>;
};
};

View File

@ -80,7 +80,7 @@
};
};
reg_vcc_wifi: reg_vcc_wifi {
reg_vcc_wifi: reg-vcc-wifi {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
@ -105,7 +105,7 @@
states = <1100000 0>, <1300000 1>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
post-power-on-delay-ms = <200>;
@ -149,7 +149,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
xr819: sdio_wifi@1 {
xr819: wifi@1 {
reg = <1>;
};
};

View File

@ -122,7 +122,7 @@
compatible = "linux,spdif-dit";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
@ -185,7 +185,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
sdiowifi: sdio_wifi@1 {
sdiowifi: wifi@1 {
reg = <1>;
};
};

View File

@ -87,7 +87,7 @@
vin-supply = <&reg_vcc5v0>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;
@ -119,7 +119,7 @@
non-removable;
status = "okay";
sdio_wifi: sdio_wifi@1 {
sdio_wifi: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;

View File

@ -62,7 +62,7 @@
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
@ -132,7 +132,7 @@
non-removable;
status = "okay";
sdio_wifi: sdio_wifi@1 {
sdio_wifi: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;

View File

@ -73,7 +73,7 @@
};
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};

View File

@ -43,7 +43,7 @@
<1300000 0x1>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;

View File

@ -105,7 +105,7 @@
};
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
};
@ -169,7 +169,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
rtl8189: sdio_wifi@1 {
rtl8189: wifi@1 {
reg = <1>;
};
};

View File

@ -143,7 +143,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
rtl8189ftv: sdio_wifi@1 {
rtl8189ftv: wifi@1 {
reg = <1>;
};
};

View File

@ -63,7 +63,7 @@
* Explicitly define the sdio device, so that we can add an ethernet
* alias for it (which e.g. makes u-boot set a mac-address).
*/
rtl8189ftv: sdio_wifi@1 {
rtl8189ftv: wifi@1 {
reg = <1>;
};
};

View File

@ -92,7 +92,7 @@
regulator-max-microvolt = <3300000>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
post-power-on-delay-ms = <200>;

View File

@ -62,7 +62,7 @@
};
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
/*
* Q8 boards use various PL# pins as wifi-en. On other boards
@ -94,7 +94,7 @@
non-removable;
status = "okay";
sdio_wifi: sdio_wifi@1 {
sdio_wifi: wifi@1 {
reg = <1>;
};
};

View File

@ -88,7 +88,7 @@
regulator-max-microvolt = <5000000>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
clocks = <&rtc CLK_OSC32K_FANOUT>;

View File

@ -75,7 +75,7 @@
};
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
};

View File

@ -100,7 +100,7 @@
enable-active-high;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
clocks = <&ccu CLK_OUTA>;

View File

@ -62,7 +62,7 @@
regulator-max-microvolt = <5000000>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN
clocks = <&ccu CLK_OUTA>;

View File

@ -51,7 +51,7 @@
startup-delay-us = <200000>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 3 GPIO_ACTIVE_LOW>; /* PB3 WIFI-RST */
post-power-on-delay-ms = <200>;

View File

@ -98,7 +98,7 @@
#size-cells = <1>;
ranges;
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@ -106,7 +106,7 @@
clock-output-names = "osc24M";
};
osc32k: osc32k_clk {
osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;

View File

@ -94,7 +94,7 @@
enable-active-high;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 6 10 GPIO_ACTIVE_LOW>; /* PG10 WIFI_EN */
clocks = <&ccu CLK_OUTA>;

View File

@ -196,14 +196,14 @@
* The actual TX clock rate is not controlled by the
* gmac_tx clock.
*/
mii_phy_tx_clk: mii_phy_tx_clk {
mii_phy_tx_clk: mii-phy-tx-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "mii_phy_tx";
};
gmac_int_tx_clk: gmac_int_tx_clk {
gmac_int_tx_clk: gmac-int-tx-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;

View File

@ -98,7 +98,7 @@
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
clocks = <&rtc CLK_OSC32K_FANOUT>;

View File

@ -18,7 +18,7 @@
stdout-path = "serial0:115200n8";
};
wifi_pwrseq: wifi_pwrseq {
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
post-power-on-delay-ms = <200>;

View File

@ -83,7 +83,7 @@
#size-cells = <1>;
ranges;
osc24M: osc24M_clk {
osc24M: osc24M-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
@ -91,7 +91,7 @@
clock-output-names = "osc24M";
};
osc32k: osc32k_clk {
osc32k: osc32k-clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;

View File

@ -98,14 +98,14 @@
/* IPB PMIC */
lm25066@40 {
compatible = "lm25066";
compatible = "ti,lm25066";
reg = <0x40>;
shunt-resistor-micro-ohms = <1000>;
};
/* 12VSB PMIC */
lm25066@41 {
compatible = "lm25066";
compatible = "ti,lm25066";
reg = <0x41>;
shunt-resistor-micro-ohms = <10000>;
};

View File

@ -14,7 +14,7 @@
#define EFUSE(hexaddr, num) \
efuse@##hexaddr { \
compatible = "lm25066"; \
compatible = "ti,lm25066"; \
reg = <0x##hexaddr>; \
shunt-resistor-micro-ohms = <675>; \
regulators { \

View File

@ -64,6 +64,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm47081-luxul-xap-1410.dtb \
bcm47081-luxul-xwr-1200.dtb \
bcm47081-tplink-archer-c5-v2.dtb \
bcm4709-asus-rt-ac3200.dtb \
bcm4709-asus-rt-ac87u.dtb \
bcm4709-buffalo-wxr-1900dhp.dtb \
bcm4709-linksys-ea9200.dtb \
@ -71,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4709-netgear-r8000.dtb \
bcm4709-tplink-archer-c9-v1.dtb \
bcm47094-asus-rt-ac3100.dtb \
bcm47094-asus-rt-ac5300.dtb \
bcm47094-asus-rt-ac88u.dtb \
bcm47094-dlink-dir-885l.dtb \
bcm47094-dlink-dir-890l.dtb \

View File

@ -5,6 +5,7 @@
#include "bcm283x-rpi-led-deprecated.dtsi"
#include "bcm283x-rpi-usb-peripheral.dtsi"
#include "bcm283x-rpi-wifi-bt.dtsi"
#include <dt-bindings/leds/common.h>
/ {
compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
@ -15,6 +16,13 @@
stdout-path = "serial1:115200n8";
};
cam1_reg: regulator-cam1 {
compatible = "regulator-fixed";
regulator-name = "cam1-reg";
enable-active-high;
gpio = <&expgpio 5 GPIO_ACTIVE_HIGH>;
};
sd_io_1v8_reg: regulator-sd-io-1v8 {
compatible = "regulator-gpio";
regulator-name = "vdd-sd-io";
@ -197,6 +205,27 @@
phy1: ethernet-phy@1 {
/* No PHY interrupt */
reg = <0x1>;
leds {
#address-cells = <1>;
#size-cells = <0>;
/* LED1 */
led@0 {
reg = <0>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
/* LED2 */
led@1 {
reg = <1>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
};
};
};

View File

@ -30,6 +30,7 @@
&genet_mdio {
clock-frequency = <1950000>;
/delete-node/ leds;
};
&led_pwr {

View File

@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "bcm2711-rpi-cm4.dtsi"
#include "bcm283x-rpi-led-deprecated.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"
@ -101,6 +102,38 @@
status = "okay";
};
&i2c0_1 {
rtc@51 {
/* Attention: An alarm resets the machine */
compatible = "nxp,pcf85063a";
reg = <0x51>;
quartz-load-femtofarads = <7000>;
};
};
&phy1 {
leds {
#address-cells = <1>;
#size-cells = <0>;
/* LED2 */
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
/* LED3 */
led@2 {
reg = <2>;
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_LAN;
default-state = "keep";
};
};
};
&led_act {
gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
};

View File

@ -17,14 +17,33 @@
pcie0 = &pcie0;
blconfig = &blconfig;
};
i2c0mux: i2c-mux0 {
compatible = "i2c-mux-pinctrl";
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&i2c0>;
pinctrl-names = "i2c0", "i2c0-vc";
pinctrl-0 = <&i2c0_gpio0>;
pinctrl-1 = <&i2c0_gpio44>;
i2c0_0: i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
i2c0_1: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&firmware {
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
expgpio: gpio {
compatible = "raspberrypi,firmware-gpio";
gpio-controller;
@ -54,6 +73,11 @@
clocks = <&firmware_clocks 4>;
};
&i2c0 {
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
};
&rmem {
/*
* RPi4's co-processor will copy the board's bootloader configuration

View File

@ -432,8 +432,8 @@
};
};
arm-pmu {
compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
pmu {
compatible = "arm,cortex-a72-pmu";
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@ -1114,6 +1114,14 @@
#address-cells = <2>;
};
&csi0 {
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
};
&csi1 {
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
};
&cma {
/*
* arm64 reserves the CMA by default somewhere in ZONE_DMA32,

View File

@ -7,13 +7,6 @@
#include <dt-bindings/power/raspberrypi-power.h>
&firmware {
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
};
&hdmi {
clocks = <&firmware_clocks 9>,
<&firmware_clocks 13>;

View File

@ -4,11 +4,12 @@
soc {
firmware: firmware {
compatible = "raspberrypi,bcm2835-firmware", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
mboxes = <&mailbox>;
dma-ranges;
firmware_clocks: clocks {
compatible = "raspberrypi,firmware-clocks";
#clock-cells = <1>;
};
};
power: power {
@ -25,6 +26,20 @@
};
};
&csi0 {
clocks = <&clocks BCM2835_CLOCK_CAM0>,
<&firmware_clocks 4>;
clock-names = "lp", "vpu";
power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
};
&csi1 {
clocks = <&clocks BCM2835_CLOCK_CAM1>,
<&firmware_clocks 4>;
clock-names = "lp", "vpu";
power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
};
&gpio {
gpioout: gpioout {
brcm,pins = <6>;

View File

@ -454,6 +454,30 @@
status = "disabled";
};
csi0: csi@7e800000 {
compatible = "brcm,bcm2835-unicam";
reg = <0x7e800000 0x800>,
<0x7e802000 0x4>;
reg-names = "unicam", "cmi";
interrupts = <2 6>;
brcm,num-data-lanes = <2>;
status = "disabled";
port {
};
};
csi1: csi@7e801000 {
compatible = "brcm,bcm2835-unicam";
reg = <0x7e801000 0x800>,
<0x7e802004 0x4>;
reg-names = "unicam", "cmi";
interrupts = <2 7>;
brcm,num-data-lanes = <4>;
status = "disabled";
port {
};
};
i2c1: i2c@7e804000 {
compatible = "brcm,bcm2835-i2c";
reg = <0x7e804000 0x1000>;

View File

@ -0,0 +1,150 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Author: Tom Brautaset <tbrautaset@gmail.com>
*/
/dts-v1/;
#include "bcm4709.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
#include <dt-bindings/leds/common.h>
/ {
compatible = "asus,rt-ac3200", "brcm,bcm4709", "brcm,bcm4708";
model = "ASUS RT-AC3200";
memory@0 {
reg = <0x00000000 0x08000000>,
<0x88000000 0x08000000>;
device_type = "memory";
};
nvram@1c080000 {
compatible = "brcm,nvram";
reg = <0x1c080000 0x00180000>;
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
button-wifi {
label = "Wi-Fi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
};
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led-power {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_POWER;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
led-wan-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN;
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
};
led-wps {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_WPS;
gpios = <&chipcommon 14 GPIO_ACTIVE_LOW>;
};
};
};
&gmac0 {
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&et0macaddr 1>;
nvmem-cell-names = "mac-address";
};
&gmac2 {
nvmem-cells = <&et0macaddr 2>;
nvmem-cell-names = "mac-address";
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x00080000>;
label = "boot";
read-only;
};
partition@80000 {
reg = <0x00080000 0x00180000>;
label = "nvram";
};
partition@200000 {
compatible = "brcm,trx";
reg = <0x00200000 0x07e00000>;
label = "firmware";
};
};
};
&srab {
status = "okay";
ports {
port@0 {
label = "wan";
};
port@1 {
label = "lan1";
};
port@2 {
label = "lan2";
};
port@3 {
label = "lan3";
};
port@4 {
label = "lan4";
};
};
};
&usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
&usb3_phy {
status = "okay";
};

View File

@ -13,11 +13,22 @@
nvram@1c080000 {
et0macaddr: et0macaddr {
#nvmem-cell-cells = <1>;
};
};
};
&gmac0 {
nvmem-cells = <&et0macaddr>;
nvmem-cells = <&et0macaddr 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&et0macaddr 1>;
nvmem-cell-names = "mac-address";
};
&gmac2 {
nvmem-cells = <&et0macaddr 2>;
nvmem-cell-names = "mac-address";
};

View File

@ -6,15 +6,13 @@
#include "bcm47094.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
chosen {
bootargs = "earlycon";
};
#include <dt-bindings/leds/common.h>
/ {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>,
<0x88000000 0x18000000>;
device_type = "memory";
};
nvram@1c080000 {
@ -22,52 +20,13 @@
reg = <0x1c080000 0x00180000>;
};
leds {
compatible = "gpio-leds";
led-power {
label = "white:power";
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
led-wan-red {
label = "red:wan";
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
};
led-lan {
label = "white:lan";
gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>;
};
led-usb2 {
label = "white:usb2";
gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port2>;
linux,default-trigger = "usbport";
};
led-usb3 {
label = "white:usb3";
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port1>, <&xhci_port1>;
linux,default-trigger = "usbport";
};
led-wps {
label = "white:wps";
gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
};
};
gpio-keys {
compatible = "gpio-keys";
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
button-led {
label = "Backlight";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
};
button-reset {
@ -82,16 +41,87 @@
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
};
button-led {
label = "Backlight";
linux,code = <KEY_BRIGHTNESS_ZERO>;
gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>;
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led-lan {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_LAN;
gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>;
};
led-power {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_POWER;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
led-usb2 {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_USB;
function-enumerator = <1>;
gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port2>;
linux,default-trigger = "usbport";
};
led-usb3 {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_USB;
function-enumerator = <2>;
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
trigger-sources = <&ehci_port1>, <&xhci_port1>;
linux,default-trigger = "usbport";
};
led-wan-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN;
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
};
led-wps {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_WPS;
gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
};
};
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x00080000>;
label = "boot";
read-only;
};
partition@80000 {
reg = <0x00080000 0x00180000>;
label = "nvram";
};
partition@200000 {
compatible = "brcm,trx";
reg = <0x00200000 0x07e00000>;
label = "firmware";
};
};
};
&srab {
compatible = "brcm,bcm53012-srab", "brcm,bcm5301x-srab";
status = "okay";
ports {
@ -136,28 +166,3 @@
&usb3_phy {
status = "okay";
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "boot";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "nvram";
reg = <0x00080000 0x00180000>;
};
partition@200000 {
label = "firmware";
reg = <0x00200000 0x07e00000>;
compatible = "brcm,trx";
};
};
};

View File

@ -0,0 +1,156 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Author: Tom Brautaset <tbrautaset@gmail.com>
*/
/dts-v1/;
#include "bcm47094.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
#include <dt-bindings/leds/common.h>
/ {
compatible = "asus,rt-ac5300", "brcm,bcm47094", "brcm,bcm4708";
model = "ASUS RT-AC5300";
memory@0 {
reg = <0x00000000 0x08000000>,
<0x88000000 0x18000000>;
device_type = "memory";
};
nvram@1c080000 {
compatible = "brcm,nvram";
reg = <0x1c080000 0x00180000>;
et1macaddr: et1macaddr {
#nvmem-cell-cells = <1>;
};
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
button-wifi {
label = "Wi-Fi";
linux,code = <KEY_RFKILL>;
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
};
button-wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led-lan {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_LAN;
gpios = <&chipcommon 21 GPIO_ACTIVE_LOW>;
};
led-power {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_POWER;
gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-on";
};
led-wan-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN;
gpios = <&chipcommon 5 GPIO_ACTIVE_HIGH>;
};
led-wps {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_WPS;
gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
};
};
};
&gmac0 {
nvmem-cells = <&et1macaddr 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&et1macaddr 1>;
nvmem-cell-names = "mac-address";
};
&gmac2 {
nvmem-cells = <&et1macaddr 2>;
nvmem-cell-names = "mac-address";
};
&nandcs {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x00000000 0x00080000>;
label = "boot";
read-only;
};
partition@80000 {
reg = <0x00080000 0x00180000>;
label = "nvram";
};
partition@200000 {
compatible = "brcm,trx";
reg = <0x00200000 0x07e00000>;
label = "firmware";
};
};
};
&srab {
status = "okay";
ports {
port@0 {
label = "lan4";
};
port@1 {
label = "lan3";
};
port@2 {
label = "lan2";
};
port@3 {
label = "lan1";
};
port@4 {
label = "wan";
};
};
};
&usb2 {
vcc-gpio = <&chipcommon 9 GPIO_ACTIVE_HIGH>;
};
&usb3_phy {
status = "okay";
};

View File

@ -13,18 +13,40 @@
nvram@1c080000 {
et1macaddr: et1macaddr {
#nvmem-cell-cells = <1>;
};
};
switch {
compatible = "realtek,rtl8365mb";
/* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
realtek,disable-leds;
dsa,member = <1 0>;
mdio {
compatible = "realtek,smi-mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
ethphy2: ethernet-phy@2 {
reg = <2>;
};
ethphy3: ethernet-phy@3 {
reg = <3>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
@ -68,29 +90,21 @@
};
};
};
};
};
mdio {
compatible = "realtek,smi-mdio";
#address-cells = <1>;
#size-cells = <0>;
&gmac0 {
status = "disabled";
};
ethphy0: ethernet-phy@0 {
reg = <0>;
};
&gmac1 {
nvmem-cells = <&et1macaddr 0>;
nvmem-cell-names = "mac-address";
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
ethphy2: ethernet-phy@2 {
reg = <2>;
};
ethphy3: ethernet-phy@3 {
reg = <3>;
};
};
};
&gmac2 {
nvmem-cells = <&et1macaddr 1>;
nvmem-cell-names = "mac-address";
};
&srab {
@ -111,12 +125,3 @@
};
};
};
&gmac0 {
status = "disabled";
};
&gmac1 {
nvmem-cells = <&et1macaddr>;
nvmem-cell-names = "mac-address";
};

View File

@ -445,9 +445,9 @@
tegra_ac97: ac97@70002000 {
status = "okay";
nvidia,codec-reset-gpio =
nvidia,codec-reset-gpios =
<&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
nvidia,codec-sync-gpio =
nvidia,codec-sync-gpios =
<&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
};

View File

@ -533,6 +533,49 @@
0x00000000 0x00000000 0x00000000 0x00000000>;
};
};
emc-tables@1 {
nvidia,ram-code = <0x1>;
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
emc-table@166500 {
reg = <166500>;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = <166500>;
nvidia,emc-registers = <0x0000000a 0x00000016
0x00000008 0x00000003 0x00000004 0x00000004
0x00000002 0x0000000c 0x00000003 0x00000003
0x00000002 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x000004df
0x00000000 0x00000003 0x00000003 0x00000003
0x00000003 0x00000001 0x0000000a 0x000000c8
0x00000003 0x00000006 0x00000004 0x00000008
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xe03b0323
0x007fe010 0x00001414 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000>;
};
emc-table@333000 {
reg = <333000>;
compatible = "nvidia,tegra20-emc-table";
clock-frequency = <333000>;
nvidia,emc-registers = <0x00000018 0x00000033
0x00000012 0x00000004 0x00000004 0x00000005
0x00000003 0x0000000c 0x00000006 0x00000006
0x00000003 0x00000001 0x00000004 0x00000005
0x00000004 0x00000009 0x0000000d 0x00000bff
0x00000000 0x00000003 0x00000003 0x00000006
0x00000006 0x00000001 0x00000011 0x000000c8
0x00000003 0x0000000e 0x00000007 0x00000008
0x00000002 0x00000000 0x00000000 0x00000002
0x00000000 0x00000000 0x00000083 0xf0440303
0x007fe010 0x00001414 0x00000000 0x00000000
0x00000000 0x00000000 0x00000000 0x00000000>;
};
};
};
usb@c5000000 {

View File

@ -349,12 +349,15 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-phytec-segin-lc-rdk-nand.dtb \
imx6ull-phytec-tauri-emmc.dtb \
imx6ull-phytec-tauri-nand.dtb \
imx6ull-seeed-npi-dev-board-emmc.dtb \
imx6ull-seeed-npi-dev-board-nand.dtb \
imx6ull-tarragon-master.dtb \
imx6ull-tarragon-micro.dtb \
imx6ull-tarragon-slave.dtb \
imx6ull-tarragon-slavext.dtb \
imx6ull-tqma6ull2-mba6ulx.dtb \
imx6ull-tqma6ull2l-mba6ulx.dtb \
imx6ull-uti260b.dtb \
imx6ulz-14x14-evk.dtb \
imx6ulz-bsh-smm-m2.dtb
dtb-$(CONFIG_SOC_IMX7D) += \

View File

@ -127,7 +127,7 @@
compatible = "ricoh,rc5t619";
reg = <0x32>;
interrupt-parent = <&gpio5>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
system-power-controller;
regulators {

View File

@ -145,7 +145,7 @@
compatible = "ricoh,rc5t619";
reg = <0x32>;
interrupt-parent = <&gpio4>;
interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
system-power-controller;
regulators {

View File

@ -15,6 +15,22 @@
device_type = "memory";
reg = <0xa0000000 0x08000000>; /* 128MB */
};
usbotgphy: usbotgphy {
compatible = "usb-nop-xceiv";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotgphy>;
reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
#phy-cells = <0>;
};
usbh2phy: usbh2phy {
compatible = "usb-nop-xceiv";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh2phy>;
reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
#phy-cells = <0>;
};
};
&cspi1 {
@ -84,6 +100,52 @@
MX27_PAD_NFWE_B__NFWE_B 0x0
>;
};
pinctrl_usbotgphy: usbotgphygrp {
fsl,pins = <
MX27_PAD_USBH1_RCV__GPIO2_25 0x1 /* reset gpio */
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
>;
};
pinctrl_usbh2phy: usbh2phygrp {
fsl,pins = <
MX27_PAD_USBH1_SUSP__GPIO2_22 0x0 /* reset gpio */
>;
};
pinctrl_usbh2: usbh2grp {
fsl,pins = <
MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
MX27_PAD_USBH2_STP__USBH2_STP 0x0
MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
>;
};
};
};
@ -95,3 +157,19 @@
nand-on-flash-bbt;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
phy_type = "ulpi";
phys = <&usbotgphy>;
status = "okay";
};
&usbh2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh2>;
phy_type = "ulpi";
phys = <&usbh2phy>;
status = "okay";
};

View File

@ -45,7 +45,7 @@
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 78770>;
pwms = <&pwm1 0 78770 0>;
brightness-levels = <0 150 200 255>;
default-brightness-level = <1>;
power-supply = <&backlight_reg>;
@ -113,7 +113,6 @@
};
&pwm1 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm_backlight>;
status = "okay";

View File

@ -13,7 +13,7 @@
backlight_lcd: backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 50000>;
pwms = <&pwm2 0 50000 0>;
power-supply = <&reg_backlight>;
brightness-levels = <0 24 28 32 36
40 44 48 52 56

View File

@ -13,7 +13,7 @@
compatible = "pwm-beeper";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_buzzer>;
pwms = <&pwm1 0 500000>;
pwms = <&pwm1 0 500000 0>;
};
gpio-buttons {
@ -162,14 +162,6 @@
>;
};
&pwm1 {
#pwm-cells = <2>;
};
&pwm2 {
#pwm-cells = <2>;
};
&uart1 {
status = "okay";
};

View File

@ -41,7 +41,7 @@
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 3000>;
pwms = <&pwm1 0 3000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
power-supply = <&reg_backlight>;
@ -313,7 +313,6 @@
};
&pwm1 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";

View File

@ -17,7 +17,7 @@
backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 50000>;
pwms = <&pwm2 0 50000 0>;
brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
default-brightness-level = <10>;
enable-gpios = <&gpio7 7 0>;

View File

@ -167,7 +167,7 @@
pwm_bl: backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 50000>;
pwms = <&pwm2 0 50000 0>;
brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
38 40 43 45 48 51 53 56 58 61 63 66 68 71
73 76 79 81 84 86 89 91 94 96 99 102 104
@ -187,7 +187,7 @@
led-1 {
label = "alarm-brightness";
pwms = <&pwm1 0 100000>;
pwms = <&pwm1 0 100000 0>;
max-brightness = <255>;
};
};
@ -628,14 +628,12 @@
};
&pwm1 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm2 {
#pwm-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";

View File

@ -202,14 +202,6 @@
};
};
&pwm1 {
#pwm-cells = <2>;
};
&pwm2 {
#pwm-cells = <2>;
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;

View File

@ -14,7 +14,7 @@
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
pwms = <&pwm1 0 5000000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
enable-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
@ -79,6 +79,5 @@
};
&pwm1 {
#pwm-cells = <2>;
status = "okay";
};

View File

@ -49,7 +49,7 @@
backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 3000>;
pwms = <&pwm3 0 3000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
pinctrl-names = "default";
@ -69,6 +69,5 @@
};
&pwm3 {
#pwm-cells = <2>;
status = "okay";
};

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