net/mlx5e: Use bitmap field for profile features
Use a features bitmap field in mlx5e_profile to declare profile support state of the different features. Let it replace the existing rx_ptp_support boolean. It will be extended to cover more features in a downstream patch. Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -956,6 +956,10 @@ struct mlx5e_rx_handlers {
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extern const struct mlx5e_rx_handlers mlx5e_rx_handlers_nic;
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enum mlx5e_profile_feature {
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MLX5E_PROFILE_FEATURE_PTP_RX,
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};
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struct mlx5e_profile {
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int (*init)(struct mlx5_core_dev *mdev,
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struct net_device *netdev);
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@ -974,9 +978,12 @@ struct mlx5e_profile {
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const struct mlx5e_rx_handlers *rx_handlers;
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int max_tc;
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u8 rq_groups;
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bool rx_ptp_support;
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u32 features;
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};
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#define mlx5e_profile_feature_cap(profile, feature) \
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((profile)->features & (MLX5E_PROFILE_FEATURE_## feature))
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void mlx5e_build_ptys2ethtool_map(void);
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bool mlx5e_check_fragmented_striding_rq_cap(struct mlx5_core_dev *mdev);
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@ -768,7 +768,7 @@ int mlx5e_ptp_alloc_rx_fs(struct mlx5e_priv *priv)
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{
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struct mlx5e_ptp_fs *ptp_fs;
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if (!priv->profile->rx_ptp_support)
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if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
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return 0;
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ptp_fs = kzalloc(sizeof(*ptp_fs), GFP_KERNEL);
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@ -783,7 +783,7 @@ void mlx5e_ptp_free_rx_fs(struct mlx5e_priv *priv)
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{
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struct mlx5e_ptp_fs *ptp_fs = priv->fs.ptp_fs;
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if (!priv->profile->rx_ptp_support)
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if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
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return;
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mlx5e_ptp_rx_unset_fs(priv);
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@ -794,7 +794,7 @@ int mlx5e_ptp_rx_manage_fs(struct mlx5e_priv *priv, bool set)
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{
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struct mlx5e_ptp *c = priv->channels.ptp;
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if (!priv->profile->rx_ptp_support)
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if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
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return 0;
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if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
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@ -1934,7 +1934,7 @@ int mlx5e_modify_rx_cqe_compression_locked(struct mlx5e_priv *priv, bool new_val
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if (curr_val == new_val)
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return 0;
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if (new_val && !priv->profile->rx_ptp_support && rx_filter) {
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if (new_val && !mlx5e_profile_feature_cap(priv->profile, PTP_RX) && rx_filter) {
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netdev_err(priv->netdev,
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"Profile doesn't support enabling of CQE compression while hardware time-stamping is enabled.\n");
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return -EINVAL;
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@ -4038,7 +4038,7 @@ int mlx5e_hwstamp_set(struct mlx5e_priv *priv, struct ifreq *ifr)
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goto err_unlock;
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}
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if (!priv->profile->rx_ptp_support)
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if (!mlx5e_profile_feature_cap(priv->profile, PTP_RX))
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err = mlx5e_hwstamp_config_no_ptp_rx(priv,
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config.rx_filter != HWTSTAMP_FILTER_NONE);
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else
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@ -5093,7 +5093,7 @@ static const struct mlx5e_profile mlx5e_nic_profile = {
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.rq_groups = MLX5E_NUM_RQ_GROUPS(XSK),
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.stats_grps = mlx5e_nic_stats_grps,
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.stats_grps_num = mlx5e_nic_stats_grps_num,
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.rx_ptp_support = true,
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.features = BIT(MLX5E_PROFILE_FEATURE_PTP_RX),
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};
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static unsigned int
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@ -1113,7 +1113,6 @@ static const struct mlx5e_profile mlx5e_rep_profile = {
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.rq_groups = MLX5E_NUM_RQ_GROUPS(REGULAR),
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.stats_grps = mlx5e_rep_stats_grps,
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.stats_grps_num = mlx5e_rep_stats_grps_num,
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.rx_ptp_support = false,
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};
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static const struct mlx5e_profile mlx5e_uplink_rep_profile = {
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@ -1134,7 +1133,6 @@ static const struct mlx5e_profile mlx5e_uplink_rep_profile = {
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.rq_groups = MLX5E_NUM_RQ_GROUPS(XSK),
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.stats_grps = mlx5e_ul_rep_stats_grps,
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.stats_grps_num = mlx5e_ul_rep_stats_grps_num,
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.rx_ptp_support = false,
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};
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/* e-Switch vport representors */
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@ -449,7 +449,6 @@ static const struct mlx5e_profile mlx5i_nic_profile = {
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.rq_groups = MLX5E_NUM_RQ_GROUPS(REGULAR),
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.stats_grps = mlx5i_stats_grps,
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.stats_grps_num = mlx5i_stats_grps_num,
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.rx_ptp_support = false,
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};
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/* mlx5i netdev NDos */
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@ -350,7 +350,6 @@ static const struct mlx5e_profile mlx5i_pkey_nic_profile = {
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.rx_handlers = &mlx5i_rx_handlers,
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.max_tc = MLX5I_MAX_NUM_TC,
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.rq_groups = MLX5E_NUM_RQ_GROUPS(REGULAR),
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.rx_ptp_support = false,
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};
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const struct mlx5e_profile *mlx5i_pkey_get_profile(void)
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