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ARM: dts: dra7: Use clksel binding for CM_CLKSEL_DPLL_DRR

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With the clkcsel binding we can drop the custom ti,bit-shift devicetree
property in favor of the standard reg property and reduce the number of
clocks to update for the make W-1 dtbs warnings.

Let's also add a comment for the clocksel clock that matches the
documentation.

Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2024-03-27 09:10:37 +02:00
parent d3c9a44103
commit 6c95cd7a40
1 changed files with 15 additions and 7 deletions
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22
arch/arm/boot/dts/ti/omap/dra7xx-clocks.dtsi
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@ -538,13 +538,21 @@
clock-div = <1>;
};
dpll_ddr_byp_mux: clock-dpll-ddr-byp-mux-23@21c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "dpll_ddr_byp_mux";
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
ti,bit-shift = <23>;
reg = <0x021c>;
/* CM_CLKSEL_DPLL_DDR */
clock@21c {
compatible = "ti,clksel";
reg = <0x21c>;
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
dpll_ddr_byp_mux: clock@23 {
reg = <23>;
compatible = "ti,mux-clock";
clock-output-names = "dpll_ddr_byp_mux";
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
#clock-cells = <0>;
};
};
dpll_ddr_ck: clock@210 {