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ARM: dts: stm32: Enable STM32H743 clock driver

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This patch enables clock driver for STM32H743 soc.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
This commit is contained in:
Gabriel Fernandez 2017-10-06 11:12:39 +02:00 committed by Alexandre Torgue
parent d69455cda1
commit 6d3b3745c5
2 changed files with 50 additions and 29 deletions
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22
arch/arm/boot/dts/stm32h743-pinctrl.dtsi
View File

@ -55,7 +55,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x0 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOA_CK>;
st,bank-name = "GPIOA";
};
@ -63,7 +63,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x400 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOB_CK>;
st,bank-name = "GPIOB";
};
@ -71,7 +71,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x800 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOC_CK>;
st,bank-name = "GPIOC";
};
@ -79,7 +79,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0xc00 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOD_CK>;
st,bank-name = "GPIOD";
};
@ -87,7 +87,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x1000 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOE_CK>;
st,bank-name = "GPIOE";
};
@ -95,7 +95,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x1400 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOF_CK>;
st,bank-name = "GPIOF";
};
@ -103,7 +103,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x1800 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOG_CK>;
st,bank-name = "GPIOG";
};
@ -111,7 +111,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x1c00 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOH_CK>;
st,bank-name = "GPIOH";
};
@ -119,7 +119,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x2000 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOI_CK>;
st,bank-name = "GPIOI";
};
@ -127,7 +127,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x2400 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOJ_CK>;
st,bank-name = "GPIOJ";
};
@ -135,7 +135,7 @@
gpio-controller;
#gpio-cells = <2>;
reg = <0x2800 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc GPIOK_CK>;
st,bank-name = "GPIOK";
};

57
arch/arm/boot/dts/stm32h743.dtsi
View File

@ -42,6 +42,8 @@
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include <dt-bindings/clock/stm32h7-clks.h>
#include <dt-bindings/mfd/stm32h7-rcc.h>
/ {
clocks {
@ -51,10 +53,16 @@
clock-frequency = <0>;
};
timer_clk: timer-clk {
clk_lse: clk-lse {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-frequency = <32768>;
};
clk_i2s: i2s_ckin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <0>;
};
};
@ -63,7 +71,7 @@
compatible = "st,stm32-timer";
reg = <0x40000c00 0x400>;
interrupts = <50>;
clocks = <&timer_clk>;
clocks = <&rcc TIM5_CK>;
};
lptimer1: timer@40002400 {
@ -71,7 +79,7 @@
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x40002400 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc LPTIM1_CK>;
clock-names = "mux";
status = "disabled";
@ -97,13 +105,13 @@
reg = <0x40004400 0x400>;
interrupts = <38>;
status = "disabled";
clocks = <&timer_clk>;
clocks = <&rcc USART2_CK>;
};
dac: dac@40007400 {
compatible = "st,stm32h7-dac-core";
reg = <0x40007400 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc DAC12_CK>;
clock-names = "pclk";
#address-cells = <1>;
#size-cells = <0>;
@ -129,8 +137,7 @@
reg = <0x40011000 0x400>;
interrupts = <37>;
status = "disabled";
clocks = <&timer_clk>;
clocks = <&rcc USART1_CK>;
};
dma1: dma@40020000 {
@ -144,7 +151,7 @@
<16>,
<17>,
<47>;
clocks = <&timer_clk>;
clocks = <&rcc DMA1_CK>;
#dma-cells = <4>;
st,mem2mem;
dma-requests = <8>;
@ -162,7 +169,7 @@
<68>,
<69>,
<70>;
clocks = <&timer_clk>;
clocks = <&rcc DMA2_CK>;
#dma-cells = <4>;
st,mem2mem;
dma-requests = <8>;
@ -176,14 +183,14 @@
dma-channels = <16>;
dma-requests = <128>;
dma-masters = <&dma1 &dma2>;
clocks = <&timer_clk>;
clocks = <&rcc DMA1_CK>;
};
adc_12: adc@40022000 {
compatible = "st,stm32h7-adc-core";
reg = <0x40022000 0x400>;
interrupts = <18>;
clocks = <&timer_clk>;
clocks = <&rcc ADC12_CK>;
clock-names = "bus";
interrupt-controller;
#interrupt-cells = <1>;
@ -215,7 +222,7 @@
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58002400 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc LPTIM2_CK>;
clock-names = "mux";
status = "disabled";
@ -241,7 +248,7 @@
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58002800 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc LPTIM3_CK>;
clock-names = "mux";
status = "disabled";
@ -262,7 +269,7 @@
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58002c00 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc LPTIM4_CK>;
clock-names = "mux";
status = "disabled";
@ -277,7 +284,7 @@
#size-cells = <0>;
compatible = "st,stm32-lptimer";
reg = <0x58003000 0x400>;
clocks = <&timer_clk>;
clocks = <&rcc LPTIM5_CK>;
clock-names = "mux";
status = "disabled";
@ -290,17 +297,31 @@
vrefbuf: regulator@58003C00 {
compatible = "st,stm32-vrefbuf";
reg = <0x58003C00 0x8>;
clocks = <&timer_clk>;
clocks = <&rcc VREF_CK>;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <2500000>;
status = "disabled";
};
rcc: reset-clock-controller@58024400 {
compatible = "st,stm32h743-rcc", "st,stm32-rcc";
reg = <0x58024400 0x400>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
st,syscfg = <&pwrcfg>;
};
pwrcfg: power-config@58024800 {
compatible = "syscon";
reg = <0x58024800 0x400>;
};
adc_3: adc@58026000 {
compatible = "st,stm32h7-adc-core";
reg = <0x58026000 0x400>;
interrupts = <127>;
clocks = <&timer_clk>;
clocks = <&rcc ADC3_CK>;
clock-names = "bus";
interrupt-controller;
#interrupt-cells = <1>;