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drm/i915/tgl: Limit ourselves to just rcs0

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More pruning away of features until we have a stable system and a basis
for debugging what's missing.

v2: Fixup vdbox/vebox fusing

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190913145556.23912-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2019-09-13 15:55:56 +01:00
parent eebab60f22
commit 6da301e529
2 changed files with 7 additions and 2 deletions
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1
drivers/gpu/drm/i915/i915_pci.c
View File

@ -799,6 +799,7 @@ static const struct intel_device_info intel_tigerlake_12_info = {
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
.has_rc6 = false, /* XXX disabled for debugging */
.has_logical_ring_preemption = false, /* XXX disabled for debugging */
.engine_mask = BIT(RCS0), /* XXX reduced for debugging */
};
#undef GEN

8
drivers/gpu/drm/i915/intel_device_info.c
View File

@ -1004,8 +1004,10 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
GEN11_GT_VEBOX_DISABLE_SHIFT;
for (i = 0; i < I915_MAX_VCS; i++) {
if (!HAS_ENGINE(dev_priv, _VCS(i)))
if (!HAS_ENGINE(dev_priv, _VCS(i))) {
vdbox_mask &= ~BIT(i);
continue;
}
if (!(BIT(i) & vdbox_mask)) {
info->engine_mask &= ~BIT(_VCS(i));
@ -1026,8 +1028,10 @@ void intel_device_info_init_mmio(struct drm_i915_private *dev_priv)
GEM_BUG_ON(vdbox_mask != VDBOX_MASK(dev_priv));
for (i = 0; i < I915_MAX_VECS; i++) {
if (!HAS_ENGINE(dev_priv, _VECS(i)))
if (!HAS_ENGINE(dev_priv, _VECS(i))) {
vebox_mask &= ~BIT(i);
continue;
}
if (!(BIT(i) & vebox_mask)) {
info->engine_mask &= ~BIT(_VECS(i));