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iwlwifi: call d3_suspend/resume in d0i3 case as well

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Some CSR registers have to be configured also
in case of suspend/resume with unified image
(which doesn't includes reconfiguration flow).

Reuse the existing d3_suspend/d3_resume trans ops,
while making sure some configurations are a bit
different, according to the wowlan type.

After this change, we no longer need the special
wowlan_d0i3 configurations done in iwl_pci_resume,
as they are already being done in the d3_resume op.

Signed-off-by: Eliad Peller <eliad@wizery.com>
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
This commit is contained in:
Eliad Peller 2015-07-09 14:17:24 +03:00 committed by Emmanuel Grumbach
parent cdc306b2f6
commit 6dfb36c89d
3 changed files with 34 additions and 21 deletions
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6
drivers/net/wireless/iwlwifi/mvm/d3.c
View File

@ -1187,6 +1187,9 @@ int iwl_mvm_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wowlan)
mutex_lock(&mvm->d0i3_suspend_mutex);
__set_bit(D0I3_DEFER_WAKEUP, &mvm->d0i3_suspend_flags);
mutex_unlock(&mvm->d0i3_suspend_mutex);
iwl_trans_d3_suspend(mvm->trans, false);
return 0;
}
@ -1949,6 +1952,9 @@ static int iwl_mvm_resume_d3(struct iwl_mvm *mvm)
static int iwl_mvm_resume_d0i3(struct iwl_mvm *mvm)
{
bool exit_now;
enum iwl_d3_status d3_status;
iwl_trans_d3_resume(mvm->trans, &d3_status, false);
/*
* make sure to clear D0I3_DEFER_WAKEUP before

13
drivers/net/wireless/iwlwifi/pcie/drv.c
View File

@ -631,17 +631,10 @@ static int iwl_pci_resume(struct device *device)
return 0;
/*
* On suspend, ict is disabled, and the interrupt mask
* gets cleared. Reconfigure them both in case of d0i3
* image. Otherwise, only enable rfkill interrupt (in
* order to keep track of the rfkill status)
* Enable rfkill interrupt (in order to keep track of
* the rfkill status)
*/
if (trans->wowlan_d0i3) {
iwl_pcie_reset_ict(trans);
iwl_enable_interrupts(trans);
} else {
iwl_enable_rfkill_int(trans);
}
iwl_enable_rfkill_int(trans);
hw_rfkill = iwl_is_rfkill_set(trans);

36
drivers/net/wireless/iwlwifi/pcie/trans.c
View File

@ -1189,6 +1189,12 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test)
{
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
if (trans->wowlan_d0i3) {
/* Enable persistence mode to avoid reset */
iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_PERSIST_MODE);
}
iwl_disable_interrupts(trans);
/*
@ -1207,12 +1213,14 @@ static void iwl_trans_pcie_d3_suspend(struct iwl_trans *trans, bool test)
iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
/*
* reset TX queues -- some of their registers reset during S3
* so if we don't reset everything here the D3 image would try
* to execute some invalid memory upon resume
*/
iwl_trans_pcie_tx_reset(trans);
if (!trans->wowlan_d0i3) {
/*
* reset TX queues -- some of their registers reset during S3
* so if we don't reset everything here the D3 image would try
* to execute some invalid memory upon resume
*/
iwl_trans_pcie_tx_reset(trans);
}
iwl_pcie_set_pwr(trans, true);
}
@ -1254,12 +1262,18 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
iwl_pcie_set_pwr(trans, false);
iwl_trans_pcie_tx_reset(trans);
if (trans->wowlan_d0i3) {
iwl_clear_bit(trans, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
} else {
iwl_trans_pcie_tx_reset(trans);
ret = iwl_pcie_rx_init(trans);
if (ret) {
IWL_ERR(trans, "Failed to resume the device (RX reset)\n");
return ret;
ret = iwl_pcie_rx_init(trans);
if (ret) {
IWL_ERR(trans,
"Failed to resume the device (RX reset)\n");
return ret;
}
}
val = iwl_read32(trans, CSR_RESET);