iio: adc: ltc2497: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Update the comment to include 'may'. Fixes: bc82222fcca1 ("iio:adc: Driver for Linear Technology LTC2497 ADC") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-23-jic23@kernel.org
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@ -20,10 +20,10 @@ struct ltc2497_driverdata {
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struct ltc2497core_driverdata common_ddata;
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struct i2c_client *client;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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*/
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__be32 buf ____cacheline_aligned;
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__be32 buf __aligned(IIO_DMA_MINALIGN);
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};
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static int ltc2497_result_and_measure(struct ltc2497core_driverdata *ddata,
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