A single pin control fix for Intel machines, affecting a bunch of
Chromebooks. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJaPRcSAAoJEEEQszewGV1zfWsP/RICiFsyWIND/Yqjh/nPYIDG xHnP2OuKCTJWzU8VmPxHhSoDTzYp8UMpQnhDbtTtWv2f/okarSx4CZoYIO1SKr4v 9Eheb39AOBQW84w1Bk7l7eyyZ68Wpku4RPtYrKPjYIik5U6qagFgVS/tXXXdPP4s I3d/zDv5023V+KcQsEOVZvuY+90W4Ujm//5Jf9AiXw9OFk1LNlbbdZKWmQGr43dG TEIDMKSDNKHLTP4x/2oixDLHG99aWC8z9nbU3fMXmUwSdIqLXkgWb3+JlI196Z3h 3ahYL0zr8OExvnqW0Ng4MsIp2fbY5EdbYID5q9MXh/TFZSsV0JytBUBwAVVssUXg CTbzxOuoZO8zY7sb8TaU4uFcul6LA3Gynumwl0pCdJES7N+M6WiAPGygPSQRsgAp 40o5u5jWKvmmm0LsfQAz19k3ly6RkUH/ZiJzQm8aGa1A7iXrJcR+QFdMrhh4Y6l0 TmQly9OVDw5qCWH/X0ycQH7+5nQPZOnSZlnCqMDhGowE8IOGulwNsd8oaWhJRlwW H254k3VoiqGxQbDpEH4xQ5iLccKkfiNzr6yXgV9eFzTb+a+6K44bfCDO8n4YDcL2 fm0b0t8Ah9wzc+o9dpgOEEuuUBLSGctVdB5oMJODABcwF+2Xx9UB2TI+nn5PfSRJ tkcOtVJbo7TDZ+TvfbUA =LwR+ -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fix from Linus Walleij: "A single pin control fix for Intel machines, affecting a bunch of Chromebooks. Nothing else collected up amazingly" * tag 'pinctrl-v4.15-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: cherryview: Mask all interrupts on Intel_Strago based systems
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@ -1620,6 +1620,22 @@ static int chv_gpio_probe(struct chv_pinctrl *pctrl, int irq)
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clear_bit(i, chip->irq.valid_mask);
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}
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/*
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* The same set of machines in chv_no_valid_mask[] have incorrectly
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* configured GPIOs that generate spurious interrupts so we use
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* this same list to apply another quirk for them.
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*
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* See also https://bugzilla.kernel.org/show_bug.cgi?id=197953.
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*/
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if (!need_valid_mask) {
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/*
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* Mask all interrupts the community is able to generate
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* but leave the ones that can only generate GPEs unmasked.
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*/
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chv_writel(GENMASK(31, pctrl->community->nirqs),
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pctrl->regs + CHV_INTMASK);
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}
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/* Clear all interrupts */
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chv_writel(0xffff, pctrl->regs + CHV_INTSTAT);
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