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ARM: dts: sunxi: h3-h5: Add Bananapi M2+ v1.2 device trees

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Bananapi released an updated revision of the H3/H5 based Bananapi M2+.
Version 1.2 enables voltage control for the CPU's regulator by using
a GPIO line to toggle a MOSFET that can change the effective resistance
value in the regulator's feedback network.

This patch adds a common .dtsi file for this new revision, which
includes the original common sunxi-bananapi-m2-plus.dtsi file, and
adds the GPIO-controlled regulator and a cpu-supply reference. H3
and H5 variant dts files are added as well.

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Chen-Yu Tsai 2018-09-26 21:23:39 +08:00 committed by Maxime Ripard
parent 36c4bef372
commit 6eeb4180d4
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1
arch/arm/boot/dts/Makefile
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@ -1033,6 +1033,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h2-plus-orangepi-r1.dtb \ sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \ sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \ sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-bananapi-m2-plus-v1.2.dtb \
sun8i-h3-beelink-x2.dtb \ sun8i-h3-beelink-x2.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \
sun8i-h3-nanopi-m1.dtb \ sun8i-h3-nanopi-m1.dtb \

13
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts Normal file
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@ -0,0 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-bananapi-m2-plus-v1.2.dtsi"
/ {
model = "Banana Pi BPI-M2-Plus v1.2 H3";
compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun8i-h3";
};

31
arch/arm/boot/dts/sunxi-bananapi-m2-plus-v1.2.dtsi Normal file
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@ -0,0 +1,31 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
*/
#include "sunxi-bananapi-m2-plus.dtsi"
/ {
/*
* Bananapi M2+ v1.2 uses a GPIO line to change the effective
* resistance on the CPU regulator's feedback pin.
*/
reg_vdd_cpux: vdd-cpux {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
gpios-states = <0x1>;
states = <1100000 0x0
1300000 0x1>;
};
};
&cpu0 {
cpu-supply = <&reg_vdd_cpux>;
};

1
arch/arm64/boot/dts/allwinner/Makefile
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@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pinebook.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb

11
arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus-v1.2.dts Normal file
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@ -0,0 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
/dts-v1/;
#include "sun50i-h5.dtsi"
#include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>
/ {
model = "Banana Pi BPI-M2-Plus v1.2 H5";
compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun50i-h5";
};