iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

mips: dts: ralink: mt7621: reorder ethernet node attributes and kids

Browse Source 
Rearrange attributes and descendents declared under the
ethernet node, recursively, to follow the DTS style guide.

Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Justin Swartz 2024-03-16 06:54:39 +02:00 committed by Thomas Bogendoerfer
parent a76a20f9e1
commit 6f04e52444
1 changed files with 48 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

88
arch/mips/boot/dts/ralink/mt7621.dtsi
View File

@ -364,46 +364,22 @@
compatible = "mediatek,mt7621-eth";
reg = <0x1e100000 0x10000>;
clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>;
clock-names = "fe", "ethif";
#address-cells = <1>;
#size-cells = <0>;
resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>;
reset-names = "fe", "eth";
clock-names = "fe", "ethif";
clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
mediatek,ethsys = <&sysc>;
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>, <&rgmii2_pins>;
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "trgmii";
reset-names = "fe", "eth";
resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>;
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mediatek,ethsys = <&sysc>;
mdio: mdio-bus {
#address-cells = <1>;
@ -412,73 +388,105 @@
switch0: switch@1f {
compatible = "mediatek,mt7621";
reg = <0x1f>;
mediatek,mcm;
resets = <&sysc MT7621_RST_MCM>;
reset-names = "mcm";
interrupt-controller;
#interrupt-cells = <1>;
interrupt-controller;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
reset-names = "mcm";
resets = <&sysc MT7621_RST_MCM>;
mediatek,mcm;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "disabled";
reg = <0>;
label = "swp0";
status = "disabled";
};
port@1 {
status = "disabled";
reg = <1>;
label = "swp1";
status = "disabled";
};
port@2 {
status = "disabled";
reg = <2>;
label = "swp2";
status = "disabled";
};
port@3 {
status = "disabled";
reg = <3>;
label = "swp3";
status = "disabled";
};
port@4 {
status = "disabled";
reg = <4>;
label = "swp4";
status = "disabled";
};
port@5 {
reg = <5>;
ethernet = <&gmac1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
speed = <1000>;
};
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
speed = <1000>;
};
};
};
};
};
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "trgmii";
fixed-link {
full-duplex;
pause;
speed = <1000>;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
full-duplex;
pause;
speed = <1000>;
};
};
};
pcie: pcie@1e140000 {