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iio: adc: ti-ads124s08: Fix alignment for DMA safety

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[ Upstream commit 7df19bd26cc0b85ff997cc9e2aaea712836b5460 ]

____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: e717f8c6dfec ("iio: adc: Add the TI ads124s08 ADC code")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-35-jic23@kernel.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Jonathan Cameron 2022-05-08 18:56:14 +01:00 committed by Greg Kroah-Hartman
parent 43e9bfc827
commit 6f0ef2b9d4
1 changed files with 1 additions and 1 deletions
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2
drivers/iio/adc/ti-ads124s08.c
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@ -106,7 +106,7 @@ struct ads124s_private {
* timestamp is maintained.
*/
u32 buffer[ADS124S08_MAX_CHANNELS + sizeof(s64)/sizeof(u32)] __aligned(8);
u8 data[5] ____cacheline_aligned;
u8 data[5] __aligned(IIO_DMA_MINALIGN);
};
#define ADS124S08_CHAN(index) \