MIPS: Replace smp_mb with release barrier function in unlocks.
Repleace smp_mb() in arch_write_unlock() and __clear_bit_unlock() to smp_mb__before_llsc() call which does "release" barrier functionality. It seems like it was missed in commit f252ffd50c97dae87b45f1dbad24f71358ccfbd6 during introduction of "acquire" and "release" semantics. [ralf@linux-mips: The original patch submission was labelled a fix but actually it replaces a barrier with another less restrictive type of barrier so it doesn't fix any ill behaviour but rather squeezes out a tad better performance. Further improvments will be possible once smp_release() has been merged.] Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: benh@kernel.crashing.org Cc: will.deacon@arm.com Cc: linux-kernel@vger.kernel.org Cc: markos.chandras@imgtec.com Cc: macro@linux-mips.org Cc: Steven.Hill@imgtec.com Cc: alexander.h.duyck@redhat.com Cc: davem@davemloft.net Patchwork: https://patchwork.linux-mips.org/patch/10507/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -469,7 +469,7 @@ static inline int test_and_change_bit(unsigned long nr,
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*/
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static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *addr)
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{
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smp_mb();
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smp_mb__before_llsc();
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__clear_bit(nr, addr);
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}
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@ -317,7 +317,7 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
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static inline void arch_write_unlock(arch_rwlock_t *rw)
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{
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smp_mb();
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smp_mb__before_llsc();
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__asm__ __volatile__(
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" # arch_write_unlock \n"
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