iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

x86/insn: perf tools: Fix vcvtph2ps instruction decoding

Browse Source 
vcvtph2ps does not have an immediate operand, so remove the erroneous
'Ib' from its opcode map entry. Add vcvtph2ps to the perf tools new
instructions test to verify it.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Acked-by: Ingo Molnar <mingo@kernel.org>
Acked-by: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: X86 ML <x86@kernel.org>
Link: http://lkml.kernel.org/r/1469003437-32706-2-git-send-email-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Adrian Hunter 2016-07-20 11:30:34 +03:00 committed by Arnaldo Carvalho de Melo
parent 5048c2af07
commit 6f6ef07f41
5 changed files with 18 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/x86/lib/x86-opcode-map.txt
View File

@ -629,7 +629,7 @@ AVXcode: 2
10: pblendvb Vdq,Wdq (66) 10: pblendvb Vdq,Wdq (66)
11: 11:
12: 12:
13: vcvtph2ps Vx,Wx,Ib (66),(v) 13: vcvtph2ps Vx,Wx (66),(v)
14: blendvps Vdq,Wdq (66) 14: blendvps Vdq,Wdq (66)
15: blendvpd Vdq,Wdq (66) 15: blendvpd Vdq,Wdq (66)
16: vpermps Vqq,Hqq,Wqq (66),(v) 16: vpermps Vqq,Hqq,Wqq (66),(v)

10
tools/perf/arch/x86/tests/insn-x86-dat-32.c
View File

@ -6,6 +6,8 @@
{{0x0f, 0x31, }, 2, 0, "", "", {{0x0f, 0x31, }, 2, 0, "", "",
"0f 31 \trdtsc ",}, "0f 31 \trdtsc ",},
{{0xc4, 0xe2, 0x7d, 0x13, 0xeb, }, 5, 0, "", "",
"c4 e2 7d 13 eb \tvcvtph2ps %xmm3,%ymm5",},
{{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", {{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "",
"f3 0f 1b 00 \tbndmk (%eax),%bnd0",}, "f3 0f 1b 00 \tbndmk (%eax),%bnd0",},
{{0xf3, 0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", {{0xf3, 0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
@ -309,19 +311,19 @@
{{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", {{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%eax,%ecx,1)",}, "0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%eax,%ecx,1)",},
{{0xf2, 0xe8, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "call", "unconditional", {{0xf2, 0xe8, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "call", "unconditional",
"f2 e8 fc ff ff ff \tbnd call 3c3 <main+0x3c3>",}, "f2 e8 fc ff ff ff \tbnd call 3c8 <main+0x3c8>",},
{{0xf2, 0xff, 0x10, }, 3, 0, "call", "indirect", {{0xf2, 0xff, 0x10, }, 3, 0, "call", "indirect",
"f2 ff 10 \tbnd call *(%eax)",}, "f2 ff 10 \tbnd call *(%eax)",},
{{0xf2, 0xc3, }, 2, 0, "ret", "indirect", {{0xf2, 0xc3, }, 2, 0, "ret", "indirect",
"f2 c3 \tbnd ret ",}, "f2 c3 \tbnd ret ",},
{{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional", {{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional",
"f2 e9 fc ff ff ff \tbnd jmp 3ce <main+0x3ce>",}, "f2 e9 fc ff ff ff \tbnd jmp 3d3 <main+0x3d3>",},
{{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional", {{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional",
"f2 e9 fc ff ff ff \tbnd jmp 3d4 <main+0x3d4>",}, "f2 e9 fc ff ff ff \tbnd jmp 3d9 <main+0x3d9>",},
{{0xf2, 0xff, 0x21, }, 3, 0, "jmp", "indirect", {{0xf2, 0xff, 0x21, }, 3, 0, "jmp", "indirect",
"f2 ff 21 \tbnd jmp *(%ecx)",}, "f2 ff 21 \tbnd jmp *(%ecx)",},
{{0xf2, 0x0f, 0x85, 0xfc, 0xff, 0xff, 0xff, }, 7, 0xfffffffc, "jcc", "conditional", {{0xf2, 0x0f, 0x85, 0xfc, 0xff, 0xff, 0xff, }, 7, 0xfffffffc, "jcc", "conditional",
"f2 0f 85 fc ff ff ff \tbnd jne 3de <main+0x3de>",}, "f2 0f 85 fc ff ff ff \tbnd jne 3e3 <main+0x3e3>",},
{{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "", {{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "",
"0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",}, "0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",},
{{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "", {{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "",

10
tools/perf/arch/x86/tests/insn-x86-dat-64.c
View File

@ -6,6 +6,8 @@
{{0x0f, 0x31, }, 2, 0, "", "", {{0x0f, 0x31, }, 2, 0, "", "",
"0f 31 \trdtsc ",}, "0f 31 \trdtsc ",},
{{0xc4, 0xe2, 0x7d, 0x13, 0xeb, }, 5, 0, "", "",
"c4 e2 7d 13 eb \tvcvtph2ps %xmm3,%ymm5",},
{{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", {{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "",
"f3 0f 1b 00 \tbndmk (%rax),%bnd0",}, "f3 0f 1b 00 \tbndmk (%rax),%bnd0",},
{{0xf3, 0x41, 0x0f, 0x1b, 0x00, }, 5, 0, "", "", {{0xf3, 0x41, 0x0f, 0x1b, 0x00, }, 5, 0, "", "",
@ -325,19 +327,19 @@
{{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", {{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%rax,%rcx,1)",}, "0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%rax,%rcx,1)",},
{{0xf2, 0xe8, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "call", "unconditional", {{0xf2, 0xe8, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "call", "unconditional",
"f2 e8 00 00 00 00 \tbnd callq 3f6 <main+0x3f6>",}, "f2 e8 00 00 00 00 \tbnd callq 3fb <main+0x3fb>",},
{{0x67, 0xf2, 0xff, 0x10, }, 4, 0, "call", "indirect", {{0x67, 0xf2, 0xff, 0x10, }, 4, 0, "call", "indirect",
"67 f2 ff 10 \tbnd callq *(%eax)",}, "67 f2 ff 10 \tbnd callq *(%eax)",},
{{0xf2, 0xc3, }, 2, 0, "ret", "indirect", {{0xf2, 0xc3, }, 2, 0, "ret", "indirect",
"f2 c3 \tbnd retq ",}, "f2 c3 \tbnd retq ",},
{{0xf2, 0xe9, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "jmp", "unconditional", {{0xf2, 0xe9, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "jmp", "unconditional",
"f2 e9 00 00 00 00 \tbnd jmpq 402 <main+0x402>",}, "f2 e9 00 00 00 00 \tbnd jmpq 407 <main+0x407>",},
{{0xf2, 0xe9, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "jmp", "unconditional", {{0xf2, 0xe9, 0x00, 0x00, 0x00, 0x00, }, 6, 0, "jmp", "unconditional",
"f2 e9 00 00 00 00 \tbnd jmpq 408 <main+0x408>",}, "f2 e9 00 00 00 00 \tbnd jmpq 40d <main+0x40d>",},
{{0x67, 0xf2, 0xff, 0x21, }, 4, 0, "jmp", "indirect", {{0x67, 0xf2, 0xff, 0x21, }, 4, 0, "jmp", "indirect",
"67 f2 ff 21 \tbnd jmpq *(%ecx)",}, "67 f2 ff 21 \tbnd jmpq *(%ecx)",},
{{0xf2, 0x0f, 0x85, 0x00, 0x00, 0x00, 0x00, }, 7, 0, "jcc", "conditional", {{0xf2, 0x0f, 0x85, 0x00, 0x00, 0x00, 0x00, }, 7, 0, "jcc", "conditional",
"f2 0f 85 00 00 00 00 \tbnd jne 413 <main+0x413>",}, "f2 0f 85 00 00 00 00 \tbnd jne 418 <main+0x418>",},
{{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "", {{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "",
"0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",}, "0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",},
{{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "", {{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "",

4
tools/perf/arch/x86/tests/insn-x86-dat-src.c
View File

@ -19,6 +19,10 @@ int main(void)
/* Following line is a marker for the awk script - do not change */ /* Following line is a marker for the awk script - do not change */
asm volatile("rdtsc"); /* Start here */ asm volatile("rdtsc"); /* Start here */
/* Test fix for vcvtph2ps in x86-opcode-map.txt */
asm volatile("vcvtph2ps %xmm3,%ymm5");
#ifdef __x86_64__ #ifdef __x86_64__
/* bndmk m64, bnd */ /* bndmk m64, bnd */

2
tools/perf/util/intel-pt-decoder/x86-opcode-map.txt
View File

@ -629,7 +629,7 @@ AVXcode: 2
10: pblendvb Vdq,Wdq (66) 10: pblendvb Vdq,Wdq (66)
11: 11:
12: 12:
13: vcvtph2ps Vx,Wx,Ib (66),(v) 13: vcvtph2ps Vx,Wx (66),(v)
14: blendvps Vdq,Wdq (66) 14: blendvps Vdq,Wdq (66)
15: blendvpd Vdq,Wdq (66) 15: blendvpd Vdq,Wdq (66)
16: vpermps Vqq,Hqq,Wqq (66),(v) 16: vpermps Vqq,Hqq,Wqq (66),(v)