Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar: "Two AMD microcode loader fixes and an OLPC firmware support fix" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, microcode, AMD: Fix early microcode loading x86, microcode, AMD: Make cpu_has_amd_erratum() use the correct struct cpuinfo_x86 x86: Don't clear olpc_ofw_header when sentinel is detected
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commit
7067552dfb
@ -35,9 +35,9 @@ static void sanitize_boot_params(struct boot_params *boot_params)
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*/
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if (boot_params->sentinel) {
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/* fields in boot_params are left uninitialized, clear them */
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memset(&boot_params->olpc_ofw_header, 0,
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memset(&boot_params->ext_ramdisk_image, 0,
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(char *)&boot_params->efi_info -
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(char *)&boot_params->olpc_ofw_header);
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(char *)&boot_params->ext_ramdisk_image);
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memset(&boot_params->kbd_status, 0,
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(char *)&boot_params->hdr -
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(char *)&boot_params->kbd_status);
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@ -59,7 +59,7 @@ static inline u16 find_equiv_id(struct equiv_cpu_entry *equiv_cpu_table,
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extern int __apply_microcode_amd(struct microcode_amd *mc_amd);
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extern int apply_microcode_amd(int cpu);
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extern enum ucode_state load_microcode_amd(int cpu, const u8 *data, size_t size);
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extern enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size);
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#ifdef CONFIG_MICROCODE_AMD_EARLY
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#ifdef CONFIG_X86_32
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@ -512,7 +512,7 @@ static void early_init_amd(struct cpuinfo_x86 *c)
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static const int amd_erratum_383[];
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static const int amd_erratum_400[];
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static bool cpu_has_amd_erratum(const int *erratum);
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static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum);
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static void init_amd(struct cpuinfo_x86 *c)
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{
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@ -729,11 +729,11 @@ static void init_amd(struct cpuinfo_x86 *c)
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value &= ~(1ULL << 24);
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wrmsrl_safe(MSR_AMD64_BU_CFG2, value);
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if (cpu_has_amd_erratum(amd_erratum_383))
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if (cpu_has_amd_erratum(c, amd_erratum_383))
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set_cpu_bug(c, X86_BUG_AMD_TLB_MMATCH);
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}
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if (cpu_has_amd_erratum(amd_erratum_400))
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if (cpu_has_amd_erratum(c, amd_erratum_400))
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set_cpu_bug(c, X86_BUG_AMD_APIC_C1E);
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rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
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@ -878,23 +878,13 @@ static const int amd_erratum_400[] =
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static const int amd_erratum_383[] =
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AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf));
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static bool cpu_has_amd_erratum(const int *erratum)
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static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)
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{
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struct cpuinfo_x86 *cpu = __this_cpu_ptr(&cpu_info);
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int osvw_id = *erratum++;
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u32 range;
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u32 ms;
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/*
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* If called early enough that current_cpu_data hasn't been initialized
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* yet, fall back to boot_cpu_data.
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*/
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if (cpu->x86 == 0)
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cpu = &boot_cpu_data;
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if (cpu->x86_vendor != X86_VENDOR_AMD)
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return false;
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if (osvw_id >= 0 && osvw_id < 65536 &&
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cpu_has(cpu, X86_FEATURE_OSVW)) {
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u64 osvw_len;
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@ -145,10 +145,9 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
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return 0;
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}
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static unsigned int verify_patch_size(int cpu, u32 patch_size,
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static unsigned int verify_patch_size(u8 family, u32 patch_size,
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unsigned int size)
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{
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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u32 max_size;
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#define F1XH_MPB_MAX_SIZE 2048
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@ -156,7 +155,7 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size,
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#define F15H_MPB_MAX_SIZE 4096
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#define F16H_MPB_MAX_SIZE 3458
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switch (c->x86) {
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switch (family) {
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case 0x14:
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max_size = F14H_MPB_MAX_SIZE;
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break;
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@ -277,9 +276,8 @@ static void cleanup(void)
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* driver cannot continue functioning normally. In such cases, we tear
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* down everything we've used up so far and exit.
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*/
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static int verify_and_add_patch(unsigned int cpu, u8 *fw, unsigned int leftover)
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static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover)
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{
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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struct microcode_header_amd *mc_hdr;
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struct ucode_patch *patch;
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unsigned int patch_size, crnt_size, ret;
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@ -299,7 +297,7 @@ static int verify_and_add_patch(unsigned int cpu, u8 *fw, unsigned int leftover)
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/* check if patch is for the current family */
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proc_fam = ((proc_fam >> 8) & 0xf) + ((proc_fam >> 20) & 0xff);
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if (proc_fam != c->x86)
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if (proc_fam != family)
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return crnt_size;
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if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
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@ -308,7 +306,7 @@ static int verify_and_add_patch(unsigned int cpu, u8 *fw, unsigned int leftover)
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return crnt_size;
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}
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ret = verify_patch_size(cpu, patch_size, leftover);
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ret = verify_patch_size(family, patch_size, leftover);
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if (!ret) {
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pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr->patch_id);
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return crnt_size;
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@ -339,7 +337,8 @@ static int verify_and_add_patch(unsigned int cpu, u8 *fw, unsigned int leftover)
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return crnt_size;
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}
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static enum ucode_state __load_microcode_amd(int cpu, const u8 *data, size_t size)
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static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
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size_t size)
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{
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enum ucode_state ret = UCODE_ERROR;
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unsigned int leftover;
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@ -362,7 +361,7 @@ static enum ucode_state __load_microcode_amd(int cpu, const u8 *data, size_t siz
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}
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while (leftover) {
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crnt_size = verify_and_add_patch(cpu, fw, leftover);
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crnt_size = verify_and_add_patch(family, fw, leftover);
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if (crnt_size < 0)
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return ret;
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@ -373,22 +372,22 @@ static enum ucode_state __load_microcode_amd(int cpu, const u8 *data, size_t siz
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return UCODE_OK;
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}
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enum ucode_state load_microcode_amd(int cpu, const u8 *data, size_t size)
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enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size)
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{
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enum ucode_state ret;
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/* free old equiv table */
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free_equiv_cpu_table();
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ret = __load_microcode_amd(cpu, data, size);
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ret = __load_microcode_amd(family, data, size);
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if (ret != UCODE_OK)
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cleanup();
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#if defined(CONFIG_MICROCODE_AMD_EARLY) && defined(CONFIG_X86_32)
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/* save BSP's matching patch for early load */
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if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
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struct ucode_patch *p = find_patch(cpu);
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if (cpu_data(smp_processor_id()).cpu_index == boot_cpu_data.cpu_index) {
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struct ucode_patch *p = find_patch(smp_processor_id());
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if (p) {
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memset(amd_bsp_mpb, 0, MPB_MAX_SIZE);
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memcpy(amd_bsp_mpb, p->data, min_t(u32, ksize(p->data),
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@ -441,7 +440,7 @@ static enum ucode_state request_microcode_amd(int cpu, struct device *device,
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goto fw_release;
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}
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ret = load_microcode_amd(cpu, fw->data, fw->size);
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ret = load_microcode_amd(c->x86, fw->data, fw->size);
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fw_release:
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release_firmware(fw);
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@ -238,25 +238,17 @@ static void __init collect_cpu_sig_on_bsp(void *arg)
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uci->cpu_sig.sig = cpuid_eax(0x00000001);
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}
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#else
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static void collect_cpu_info_amd_early(struct cpuinfo_x86 *c,
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struct ucode_cpu_info *uci)
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void load_ucode_amd_ap(void)
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{
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unsigned int cpu = smp_processor_id();
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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u32 rev, eax;
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rdmsr(MSR_AMD64_PATCH_LEVEL, rev, eax);
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eax = cpuid_eax(0x00000001);
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uci->cpu_sig.sig = eax;
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uci->cpu_sig.rev = rev;
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c->microcode = rev;
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c->x86 = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
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}
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void load_ucode_amd_ap(void)
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{
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unsigned int cpu = smp_processor_id();
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collect_cpu_info_amd_early(&cpu_data(cpu), ucode_cpu_info + cpu);
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uci->cpu_sig.sig = eax;
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if (cpu && !ucode_loaded) {
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void *ucode;
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@ -265,8 +257,10 @@ void load_ucode_amd_ap(void)
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return;
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ucode = (void *)(initrd_start + ucode_offset);
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if (load_microcode_amd(0, ucode, ucode_size) != UCODE_OK)
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eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
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if (load_microcode_amd(eax, ucode, ucode_size) != UCODE_OK)
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return;
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ucode_loaded = true;
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}
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@ -278,6 +272,8 @@ int __init save_microcode_in_initrd_amd(void)
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{
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enum ucode_state ret;
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void *ucode;
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u32 eax;
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#ifdef CONFIG_X86_32
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unsigned int bsp = boot_cpu_data.cpu_index;
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struct ucode_cpu_info *uci = ucode_cpu_info + bsp;
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@ -293,7 +289,10 @@ int __init save_microcode_in_initrd_amd(void)
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return 0;
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ucode = (void *)(initrd_start + ucode_offset);
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ret = load_microcode_amd(0, ucode, ucode_size);
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eax = cpuid_eax(0x00000001);
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eax = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
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ret = load_microcode_amd(eax, ucode, ucode_size);
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if (ret != UCODE_OK)
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return -EINVAL;
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