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i40e: Use DECLARE_BITMAP for flags and hw_features fields in i40e_pf

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Convert flags and hw_features fields from i40e_pf from u32 to
bitmaps and their usage to use bit access functions.

Changes:
- Convert "pf_ptr->(flags|hw_features) & FL" to "test_bit(FL, ...)"
- Convert "pf_ptr->(flags|hw_features) |= FL" to "set_bit(FL, ...)"
- Convert "pf_ptr->(flags|hw_features) &= ~FL" to "clear_bit(FL, ...)"
- Rename flag field to bitno in i40e_priv_flags and adjust ethtool
  callbacks to work with flags bitmap
- Rename flag names where '_ENABLED'->'_ENA' and '_DISABLED'->'_DIS'
  like in ice driver

Signed-off-by: Ivan Vecera <ivecera@redhat.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Link: https://lore.kernel.org/r/20231113231047.548659-7-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Ivan Vecera 2023-11-13 15:10:25 -08:00 committed by Jakub Kicinski
parent addca9175e
commit 70756d0a47
9 changed files with 544 additions and 515 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

165
drivers/net/ethernet/intel/i40e/i40e.h
View File

@ -34,11 +34,11 @@
#define I40E_MIN_VSI_ALLOC 83 /* LAN, ATR, FCOE, 64 VF */
/* max 16 qps */
#define i40e_default_queues_per_vmdq(pf) \
(((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)
(test_bit(I40E_HW_RSS_AQ_CAPABLE, (pf)->hw_features) ? 4 : 1)
#define I40E_DEFAULT_QUEUES_PER_VF 4
#define I40E_MAX_VF_QUEUES 16
#define i40e_pf_get_max_q_per_tc(pf) \
(((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)
(test_bit(I40E_HW_128_QP_RSS_CAPABLE, (pf)->hw_features) ? 128 : 64)
#define I40E_FDIR_RING_COUNT 32
#define I40E_MAX_AQ_BUF_SIZE 4096
#define I40E_AQ_LEN 256
@ -139,6 +139,82 @@ enum i40e_vsi_state {
__I40E_VSI_STATE_SIZE__,
};
enum i40e_pf_hw_features {
I40E_HW_RSS_AQ_CAPABLE,
I40E_HW_128_QP_RSS_CAPABLE,
I40E_HW_ATR_EVICT_CAPABLE,
I40E_HW_WB_ON_ITR_CAPABLE,
I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE,
I40E_HW_NO_PCI_LINK_CHECK,
I40E_HW_100M_SGMII_CAPABLE,
I40E_HW_NO_DCB_SUPPORT,
I40E_HW_USE_SET_LLDP_MIB,
I40E_HW_GENEVE_OFFLOAD_CAPABLE,
I40E_HW_PTP_L4_CAPABLE,
I40E_HW_WOL_MC_MAGIC_PKT_WAKE,
I40E_HW_HAVE_CRT_RETIMER,
I40E_HW_OUTER_UDP_CSUM_CAPABLE,
I40E_HW_PHY_CONTROLS_LEDS,
I40E_HW_STOP_FW_LLDP,
I40E_HW_PORT_ID_VALID,
I40E_HW_RESTART_AUTONEG,
I40E_PF_HW_FEATURES_NBITS, /* must be last */
};
enum i40e_pf_flags {
I40E_FLAG_MSI_ENA,
I40E_FLAG_MSIX_ENA,
I40E_FLAG_RSS_ENA,
I40E_FLAG_VMDQ_ENA,
I40E_FLAG_SRIOV_ENA,
I40E_FLAG_DCB_CAPABLE,
I40E_FLAG_DCB_ENA,
I40E_FLAG_FD_SB_ENA,
I40E_FLAG_FD_ATR_ENA,
I40E_FLAG_MFP_ENA,
I40E_FLAG_HW_ATR_EVICT_ENA,
I40E_FLAG_VEB_MODE_ENA,
I40E_FLAG_VEB_STATS_ENA,
I40E_FLAG_LINK_POLLING_ENA,
I40E_FLAG_TRUE_PROMISC_ENA,
I40E_FLAG_LEGACY_RX_ENA,
I40E_FLAG_PTP_ENA,
I40E_FLAG_IWARP_ENA,
I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA,
I40E_FLAG_SOURCE_PRUNING_DIS,
I40E_FLAG_TC_MQPRIO_ENA,
I40E_FLAG_FD_SB_INACTIVE,
I40E_FLAG_FD_SB_TO_CLOUD_FILTER,
I40E_FLAG_FW_LLDP_DIS,
I40E_FLAG_RS_FEC,
I40E_FLAG_BASE_R_FEC,
/* TOTAL_PORT_SHUTDOWN_ENA
* Allows to physically disable the link on the NIC's port.
* If enabled, (after link down request from the OS)
* no link, traffic or led activity is possible on that port.
*
* If I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA is set, the
* I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA must be explicitly forced
* to true and cannot be disabled by system admin at that time.
* The functionalities are exclusive in terms of configuration, but
* they also have similar behavior (allowing to disable physical
* link of the port), with following differences:
* - LINK_DOWN_ON_CLOSE_ENA is configurable at host OS run-time and
* is supported by whole family of 7xx Intel Ethernet Controllers
* - TOTAL_PORT_SHUTDOWN_ENA may be enabled only before OS loads
* (in BIOS) only if motherboard's BIOS and NIC's FW has support of it
* - when LINK_DOWN_ON_CLOSE_ENABLED is used, the link is being brought
* down by sending phy_type=0 to NIC's FW
* - when TOTAL_PORT_SHUTDOWN_ENA is used, phy_type is not altered,
* instead the link is being brought down by clearing
* bit (I40E_AQ_PHY_ENABLE_LINK) in abilities field of
* i40e_aq_set_phy_config structure
*/
I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
I40E_FLAG_VF_VLAN_PRUNING_ENA,
I40E_PF_FLAGS_NBITS, /* must be last */
};
enum i40e_interrupt_policy {
I40E_INTERRUPT_BEST_CASE,
I40E_INTERRUPT_MEDIUM,
@ -481,77 +557,8 @@ struct i40e_pf {
struct timer_list service_timer;
struct work_struct service_task;
u32 hw_features;
#define I40E_HW_RSS_AQ_CAPABLE BIT(0)
#define I40E_HW_128_QP_RSS_CAPABLE BIT(1)
#define I40E_HW_ATR_EVICT_CAPABLE BIT(2)
#define I40E_HW_WB_ON_ITR_CAPABLE BIT(3)
#define I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT(4)
#define I40E_HW_NO_PCI_LINK_CHECK BIT(5)
#define I40E_HW_100M_SGMII_CAPABLE BIT(6)
#define I40E_HW_NO_DCB_SUPPORT BIT(7)
#define I40E_HW_USE_SET_LLDP_MIB BIT(8)
#define I40E_HW_GENEVE_OFFLOAD_CAPABLE BIT(9)
#define I40E_HW_PTP_L4_CAPABLE BIT(10)
#define I40E_HW_WOL_MC_MAGIC_PKT_WAKE BIT(11)
#define I40E_HW_HAVE_CRT_RETIMER BIT(13)
#define I40E_HW_OUTER_UDP_CSUM_CAPABLE BIT(14)
#define I40E_HW_PHY_CONTROLS_LEDS BIT(15)
#define I40E_HW_STOP_FW_LLDP BIT(16)
#define I40E_HW_PORT_ID_VALID BIT(17)
#define I40E_HW_RESTART_AUTONEG BIT(18)
u32 flags;
#define I40E_FLAG_MSI_ENABLED BIT(0)
#define I40E_FLAG_MSIX_ENABLED BIT(1)
#define I40E_FLAG_RSS_ENABLED BIT(2)
#define I40E_FLAG_VMDQ_ENABLED BIT(3)
#define I40E_FLAG_SRIOV_ENABLED BIT(4)
#define I40E_FLAG_DCB_CAPABLE BIT(5)
#define I40E_FLAG_DCB_ENABLED BIT(6)
#define I40E_FLAG_FD_SB_ENABLED BIT(7)
#define I40E_FLAG_FD_ATR_ENABLED BIT(8)
#define I40E_FLAG_MFP_ENABLED BIT(9)
#define I40E_FLAG_HW_ATR_EVICT_ENABLED BIT(10)
#define I40E_FLAG_VEB_MODE_ENABLED BIT(11)
#define I40E_FLAG_VEB_STATS_ENABLED BIT(12)
#define I40E_FLAG_LINK_POLLING_ENABLED BIT(13)
#define I40E_FLAG_TRUE_PROMISC_SUPPORT BIT(14)
#define I40E_FLAG_LEGACY_RX BIT(15)
#define I40E_FLAG_PTP BIT(16)
#define I40E_FLAG_IWARP_ENABLED BIT(17)
#define I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED BIT(18)
#define I40E_FLAG_SOURCE_PRUNING_DISABLED BIT(19)
#define I40E_FLAG_TC_MQPRIO BIT(20)
#define I40E_FLAG_FD_SB_INACTIVE BIT(21)
#define I40E_FLAG_FD_SB_TO_CLOUD_FILTER BIT(22)
#define I40E_FLAG_DISABLE_FW_LLDP BIT(23)
#define I40E_FLAG_RS_FEC BIT(24)
#define I40E_FLAG_BASE_R_FEC BIT(25)
/* TOTAL_PORT_SHUTDOWN
* Allows to physically disable the link on the NIC's port.
* If enabled, (after link down request from the OS)
* no link, traffic or led activity is possible on that port.
*
* If I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED is set, the
* I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED must be explicitly forced to true
* and cannot be disabled by system admin at that time.
* The functionalities are exclusive in terms of configuration, but they also
* have similar behavior (allowing to disable physical link of the port),
* with following differences:
* - LINK_DOWN_ON_CLOSE_ENABLED is configurable at host OS run-time and is
* supported by whole family of 7xx Intel Ethernet Controllers
* - TOTAL_PORT_SHUTDOWN may be enabled only before OS loads (in BIOS)
* only if motherboard's BIOS and NIC's FW has support of it
* - when LINK_DOWN_ON_CLOSE_ENABLED is used, the link is being brought down
* by sending phy_type=0 to NIC's FW
* - when TOTAL_PORT_SHUTDOWN is used, phy_type is not altered, instead
* the link is being brought down by clearing bit (I40E_AQ_PHY_ENABLE_LINK)
* in abilities field of i40e_aq_set_phy_config structure
*/
#define I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED BIT(26)
#define I40E_FLAG_VF_VLAN_PRUNING BIT(27)
DECLARE_BITMAP(hw_features, I40E_PF_HW_FEATURES_NBITS);
DECLARE_BITMAP(flags, I40E_PF_FLAGS_NBITS);
struct i40e_client_instance *cinst;
bool stat_offsets_loaded;
struct i40e_hw_port_stats stats;
@ -1267,7 +1274,7 @@ struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
static inline bool i40e_is_sw_dcb(struct i40e_pf *pf)
{
return !!(pf->flags & I40E_FLAG_DISABLE_FW_LLDP);
return test_bit(I40E_FLAG_FW_LLDP_DIS, pf->flags);
}
#ifdef CONFIG_I40E_DCB
@ -1301,7 +1308,7 @@ int i40e_set_partition_bw_setting(struct i40e_pf *pf);
int i40e_commit_partition_bw_setting(struct i40e_pf *pf);
void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags);
void i40e_set_fec_in_flags(u8 fec_cfg, unsigned long *flags);
static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi)
{
@ -1321,13 +1328,13 @@ int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
* i40e_is_tc_mqprio_enabled - check if TC MQPRIO is enabled on PF
* @pf: pointer to a pf.
*
* Check and return value of flag I40E_FLAG_TC_MQPRIO.
* Check and return state of flag I40E_FLAG_TC_MQPRIO.
*
* Return: I40E_FLAG_TC_MQPRIO set state.
* Return: true/false if I40E_FLAG_TC_MQPRIO is set or not
**/
static inline u32 i40e_is_tc_mqprio_enabled(struct i40e_pf *pf)
static inline bool i40e_is_tc_mqprio_enabled(struct i40e_pf *pf)
{
return pf->flags & I40E_FLAG_TC_MQPRIO;
return test_bit(I40E_FLAG_TC_MQPRIO_ENA, pf->flags);
}
/**

24
drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
View File

@ -310,8 +310,8 @@ static u8 i40e_dcbnl_getstate(struct net_device *netdev)
struct i40e_pf *pf = i40e_netdev_to_pf(netdev);
dev_dbg(&pf->pdev->dev, "DCB state=%d\n",
!!(pf->flags & I40E_FLAG_DCB_ENABLED));
return !!(pf->flags & I40E_FLAG_DCB_ENABLED);
test_bit(I40E_FLAG_DCB_ENA, pf->flags) ? 1 : 0);
return test_bit(I40E_FLAG_DCB_ENA, pf->flags) ? 1 : 0;
}
/**
@ -331,19 +331,19 @@ static u8 i40e_dcbnl_setstate(struct net_device *netdev, u8 state)
return ret;
dev_dbg(&pf->pdev->dev, "new state=%d current state=%d\n",
state, (pf->flags & I40E_FLAG_DCB_ENABLED) ? 1 : 0);
state, test_bit(I40E_FLAG_DCB_ENA, pf->flags) ? 1 : 0);
/* Nothing to do */
if (!state == !(pf->flags & I40E_FLAG_DCB_ENABLED))
if (!state == !test_bit(I40E_FLAG_DCB_ENA, pf->flags))
return ret;
if (i40e_is_sw_dcb(pf)) {
if (state) {
pf->flags |= I40E_FLAG_DCB_ENABLED;
set_bit(I40E_FLAG_DCB_ENA, pf->flags);
memcpy(&pf->hw.desired_dcbx_config,
&pf->hw.local_dcbx_config,
sizeof(struct i40e_dcbx_config));
} else {
pf->flags &= ~I40E_FLAG_DCB_ENABLED;
clear_bit(I40E_FLAG_DCB_ENA, pf->flags);
}
} else {
/* Cannot directly manipulate FW LLDP Agent */
@ -653,7 +653,7 @@ static u8 i40e_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
{
struct i40e_pf *pf = i40e_netdev_to_pf(netdev);
if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
if (!test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
return I40E_DCBNL_STATUS_ERROR;
switch (capid) {
@ -693,7 +693,7 @@ static int i40e_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
{
struct i40e_pf *pf = i40e_netdev_to_pf(netdev);
if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
if (!test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
return -EINVAL;
*num = I40E_MAX_TRAFFIC_CLASS;
@ -891,11 +891,11 @@ void i40e_dcbnl_set_all(struct i40e_vsi *vsi)
return;
/* DCB not enabled */
if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
if (!test_bit(I40E_FLAG_DCB_ENA, pf->flags))
return;
/* MFP mode but not an iSCSI PF so return */
if ((pf->flags & I40E_FLAG_MFP_ENABLED) && !(hw->func_caps.iscsi))
if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) && !(hw->func_caps.iscsi))
return;
dcbxcfg = &hw->local_dcbx_config;
@ -1002,7 +1002,7 @@ void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
int i;
/* MFP mode but not an iSCSI PF so return */
if ((pf->flags & I40E_FLAG_MFP_ENABLED) && !(pf->hw.func_caps.iscsi))
if (test_bit(I40E_FLAG_MFP_ENA, pf->flags) && !(pf->hw.func_caps.iscsi))
return;
for (i = 0; i < old_cfg->numapps; i++) {
@ -1025,7 +1025,7 @@ void i40e_dcbnl_setup(struct i40e_vsi *vsi)
struct i40e_pf *pf = i40e_netdev_to_pf(dev);
/* Not DCB capable */
if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
if (!test_bit(I40E_FLAG_DCB_CAPABLE, pf->flags))
return;
dev->dcbnl_ops = &dcbnl_ops;

4
drivers/net/ethernet/intel/i40e/i40e_debugfs.c
View File

@ -820,8 +820,8 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
/* By default we are in VEPA mode, if this is the first VF/VMDq
* VSI to be added switch to VEB mode.
*/
if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
}

209
drivers/net/ethernet/intel/i40e/i40e_ethtool.c
View File

@ -430,35 +430,35 @@ static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
struct i40e_priv_flags {
char flag_string[ETH_GSTRING_LEN];
u64 flag;
u8 bitno;
bool read_only;
};
#define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
#define I40E_PRIV_FLAG(_name, _bitno, _read_only) { \
.flag_string = _name, \
.flag = _flag, \
.bitno = _bitno, \
.read_only = _read_only, \
}
static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
/* NOTE: MFP setting cannot be changed */
I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENA, 1),
I40E_PRIV_FLAG("total-port-shutdown",
I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED, 1),
I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 1),
I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENA, 0),
I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENA, 0),
I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENA, 0),
I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENA, 0),
I40E_PRIV_FLAG("link-down-on-close",
I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, 0),
I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX_ENA, 0),
I40E_PRIV_FLAG("disable-source-pruning",
I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
I40E_FLAG_SOURCE_PRUNING_DIS, 0),
I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_FW_LLDP_DIS, 0),
I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
I40E_PRIV_FLAG("vf-vlan-pruning",
I40E_FLAG_VF_VLAN_PRUNING, 0),
I40E_FLAG_VF_VLAN_PRUNING_ENA, 0),
};
#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
@ -466,7 +466,7 @@ static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
/* Private flags with a global effect, restricted to PF 0 */
static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
I40E_PRIV_FLAG("vf-true-promisc-support",
I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
I40E_FLAG_TRUE_PROMISC_ENA, 0),
};
#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
@ -502,7 +502,7 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
ethtool_link_ksettings_add_link_mode(ks, advertising,
1000baseT_Full);
if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
if (test_bit(I40E_HW_100M_SGMII_CAPABLE, pf->hw_features)) {
ethtool_link_ksettings_add_link_mode(ks, supported,
100baseT_Full);
ethtool_link_ksettings_add_link_mode(ks, advertising,
@ -601,7 +601,7 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
10000baseKX4_Full);
}
if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
!test_bit(I40E_HW_HAVE_CRT_RETIMER, pf->hw_features)) {
ethtool_link_ksettings_add_link_mode(ks, supported,
10000baseKR_Full);
if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
@ -609,7 +609,7 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
10000baseKR_Full);
}
if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
!test_bit(I40E_HW_HAVE_CRT_RETIMER, pf->hw_features)) {
ethtool_link_ksettings_add_link_mode(ks, supported,
1000baseKX_Full);
if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
@ -917,7 +917,7 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw,
if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
ethtool_link_ksettings_add_link_mode(ks, advertising,
1000baseT_Full);
if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
if (test_bit(I40E_HW_100M_SGMII_CAPABLE, pf->hw_features)) {
ethtool_link_ksettings_add_link_mode(ks, supported,
100baseT_Full);
if (hw_link_info->requested_speeds &
@ -1488,12 +1488,8 @@ static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
struct i40e_pf *pf = np->vsi->back;
struct i40e_hw *hw = &pf->hw;
int status = 0;
u32 flags = 0;
int err = 0;
flags = READ_ONCE(pf->flags);
i40e_set_fec_in_flags(fec_cfg, &flags);
/* Get the current phy config */
memset(&abilities, 0, sizeof(abilities));
status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
@ -1525,7 +1521,7 @@ static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
err = -EAGAIN;
goto done;
}
pf->flags = flags;
i40e_set_fec_in_flags(fec_cfg, pf->flags);
status = i40e_update_link_info(hw);
if (status)
/* debug level message only due to relation to the link
@ -2432,7 +2428,7 @@ static void i40e_get_ethtool_stats(struct net_device *netdev,
veb_stats = ((pf->lan_veb != I40E_NO_VEB) &&
(pf->lan_veb < I40E_MAX_VEB) &&
(pf->flags & I40E_FLAG_VEB_STATS_ENABLED));
test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags));
if (veb_stats) {
veb = pf->veb[pf->lan_veb];
@ -2561,7 +2557,7 @@ static int i40e_get_ts_info(struct net_device *dev,
struct i40e_pf *pf = i40e_netdev_to_pf(dev);
/* only report HW timestamping if PTP is enabled */
if (!(pf->flags & I40E_FLAG_PTP))
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
return ethtool_op_get_ts_info(dev, info);
info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
@ -2583,7 +2579,7 @@ static int i40e_get_ts_info(struct net_device *dev,
BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
if (test_bit(I40E_HW_PTP_L4_CAPABLE, pf->hw_features))
info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
@ -2832,7 +2828,7 @@ static int i40e_set_phys_id(struct net_device *netdev,
switch (state) {
case ETHTOOL_ID_ACTIVE:
if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
if (!test_bit(I40E_HW_PHY_CONTROLS_LEDS, pf->hw_features)) {
pf->led_status = i40e_led_get(hw);
} else {
if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
@ -2844,19 +2840,19 @@ static int i40e_set_phys_id(struct net_device *netdev,
}
return blink_freq;
case ETHTOOL_ID_ON:
if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
if (!test_bit(I40E_HW_PHY_CONTROLS_LEDS, pf->hw_features))
i40e_led_set(hw, 0xf, false);
else
ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
break;
case ETHTOOL_ID_OFF:
if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
if (!test_bit(I40E_HW_PHY_CONTROLS_LEDS, pf->hw_features))
i40e_led_set(hw, 0x0, false);
else
ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
break;
case ETHTOOL_ID_INACTIVE:
if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
if (!test_bit(I40E_HW_PHY_CONTROLS_LEDS, pf->hw_features)) {
i40e_led_set(hw, pf->led_status, false);
} else {
ret = i40e_led_set_phy(hw, false, pf->led_status,
@ -3641,7 +3637,7 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
if (pf->flags & I40E_FLAG_MFP_ENABLED) {
if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
dev_err(&pf->pdev->dev,
"Change of RSS hash input set is not supported when MFP mode is enabled\n");
return -EOPNOTSUPP;
@ -3657,19 +3653,22 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
switch (nfc->flow_type) {
case TCP_V4_FLOW:
set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
if (test_bit(I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE,
pf->hw_features))
set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
flow_pctypes);
break;
case TCP_V6_FLOW:
set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
if (test_bit(I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE,
pf->hw_features))
set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
flow_pctypes);
break;
case UDP_V4_FLOW:
set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
if (test_bit(I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE,
pf->hw_features)) {
set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
flow_pctypes);
set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
@ -3679,7 +3678,8 @@ static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
break;
case UDP_V6_FLOW:
set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
if (test_bit(I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE,
pf->hw_features)) {
set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
flow_pctypes);
set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
@ -4657,7 +4657,7 @@ static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
* main port cannot change them when in MFP mode as this would impact
* any filters on the other ports.
*/
if (pf->flags & I40E_FLAG_MFP_ENABLED) {
if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
return -EOPNOTSUPP;
}
@ -4817,7 +4817,7 @@ static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
return -EINVAL;
pf = vsi->back;
if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
return -EOPNOTSUPP;
if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
@ -5014,7 +5014,7 @@ static void i40e_get_channels(struct net_device *dev,
ch->max_combined = i40e_max_channels(vsi);
/* report info for other vector */
ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
ch->other_count = test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0;
ch->max_other = ch->other_count;
/* Note: This code assumes DCB is disabled for now. */
@ -5057,7 +5057,7 @@ static int i40e_set_channels(struct net_device *dev,
return -EINVAL;
/* verify other_count has not changed */
if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
if (ch->other_count != (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0))
return -EINVAL;
/* verify the number of channels does not exceed hardware limits */
@ -5228,11 +5228,11 @@ static u32 i40e_get_priv_flags(struct net_device *dev)
u32 i, j, ret_flags = 0;
for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
const struct i40e_priv_flags *priv_flags;
const struct i40e_priv_flags *priv_flag;
priv_flags = &i40e_gstrings_priv_flags[i];
priv_flag = &i40e_gstrings_priv_flags[i];
if (priv_flags->flag & pf->flags)
if (test_bit(priv_flag->bitno, pf->flags))
ret_flags |= BIT(i);
}
@ -5240,11 +5240,11 @@ static u32 i40e_get_priv_flags(struct net_device *dev)
return ret_flags;
for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
const struct i40e_priv_flags *priv_flags;
const struct i40e_priv_flags *priv_flag;
priv_flags = &i40e_gl_gstrings_priv_flags[j];
priv_flag = &i40e_gl_gstrings_priv_flags[j];
if (priv_flags->flag & pf->flags)
if (test_bit(priv_flag->bitno, pf->flags))
ret_flags |= BIT(i + j);
}
@ -5258,8 +5258,10 @@ static u32 i40e_get_priv_flags(struct net_device *dev)
**/
static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
{
DECLARE_BITMAP(changed_flags, I40E_PF_FLAGS_NBITS);
DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS);
DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS);
struct i40e_netdev_priv *np = netdev_priv(dev);
u64 orig_flags, new_flags, changed_flags;
enum i40e_admin_queue_err adq_err;
struct i40e_vsi *vsi = np->vsi;
struct i40e_pf *pf = vsi->back;
@ -5267,51 +5269,57 @@ static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
int status;
u32 i, j;
orig_flags = READ_ONCE(pf->flags);
new_flags = orig_flags;
bitmap_copy(orig_flags, pf->flags, I40E_PF_FLAGS_NBITS);
bitmap_copy(new_flags, pf->flags, I40E_PF_FLAGS_NBITS);
for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
const struct i40e_priv_flags *priv_flags;
const struct i40e_priv_flags *priv_flag;
bool new_val;
priv_flags = &i40e_gstrings_priv_flags[i];
if (flags & BIT(i))
new_flags |= priv_flags->flag;
else
new_flags &= ~(priv_flags->flag);
priv_flag = &i40e_gstrings_priv_flags[i];
new_val = (flags & BIT(i)) ? true : false;
/* If this is a read-only flag, it can't be changed */
if (priv_flags->read_only &&
((orig_flags ^ new_flags) & ~BIT(i)))
if (priv_flag->read_only &&
test_bit(priv_flag->bitno, orig_flags) != new_val)
return -EOPNOTSUPP;
if (new_val)
set_bit(priv_flag->bitno, new_flags);
else
clear_bit(priv_flag->bitno, new_flags);
}
if (pf->hw.pf_id != 0)
goto flags_complete;
for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
const struct i40e_priv_flags *priv_flags;
const struct i40e_priv_flags *priv_flag;
bool new_val;
priv_flags = &i40e_gl_gstrings_priv_flags[j];
if (flags & BIT(i + j))
new_flags |= priv_flags->flag;
else
new_flags &= ~(priv_flags->flag);
priv_flag = &i40e_gl_gstrings_priv_flags[j];
new_val = (flags & BIT(i + j)) ? true : false;
/* If this is a read-only flag, it can't be changed */
if (priv_flags->read_only &&
((orig_flags ^ new_flags) & ~BIT(i)))
if (priv_flag->read_only &&
test_bit(priv_flag->bitno, orig_flags) != new_val)
return -EOPNOTSUPP;
if (new_val)
set_bit(priv_flag->bitno, new_flags);
else
clear_bit(priv_flag->bitno, new_flags);
}
flags_complete:
changed_flags = orig_flags ^ new_flags;
bitmap_xor(changed_flags, pf->flags, orig_flags, I40E_PF_FLAGS_NBITS);
if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP)
if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags))
reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
I40E_FLAG_LEGACY_RX | I40E_FLAG_SOURCE_PRUNING_DISABLED))
if (test_bit(I40E_FLAG_VEB_STATS_ENA, changed_flags) ||
test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) ||
test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, changed_flags))
reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
/* Before we finalize any flag changes, we need to perform some
@ -5319,8 +5327,8 @@ flags_complete:
*/
/* ATR eviction is not supported on all devices */
if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
!(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
if (test_bit(I40E_FLAG_HW_ATR_EVICT_ENA, new_flags) &&
!test_bit(I40E_HW_ATR_EVICT_CAPABLE, pf->hw_features))
return -EOPNOTSUPP;
/* If the driver detected FW LLDP was disabled on init, this flag could
@ -5331,15 +5339,14 @@ flags_complete:
* disable LLDP, however we _must_ not allow the user to enable/disable
* LLDP with this flag on unsupported FW versions.
*/
if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
if (!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE)) {
dev_warn(&pf->pdev->dev,
"Device does not support changing FW LLDP\n");
return -EOPNOTSUPP;
}
if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags) &&
(!(pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))) {
dev_warn(&pf->pdev->dev,
"Device does not support changing FW LLDP\n");
return -EOPNOTSUPP;
}
if (changed_flags & I40E_FLAG_RS_FEC &&
if (test_bit(I40E_FLAG_RS_FEC, changed_flags) &&
pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
pf->hw.device_id != I40E_DEV_ID_25G_B) {
dev_warn(&pf->pdev->dev,
@ -5347,7 +5354,7 @@ flags_complete:
return -EOPNOTSUPP;
}
if (changed_flags & I40E_FLAG_BASE_R_FEC &&
if (test_bit(I40E_FLAG_BASE_R_FEC, changed_flags) &&
pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
pf->hw.device_id != I40E_DEV_ID_25G_B &&
pf->hw.device_id != I40E_DEV_ID_KX_X722) {
@ -5362,17 +5369,17 @@ flags_complete:
*/
/* Flush current ATR settings if ATR was disabled */
if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
!(new_flags & I40E_FLAG_FD_ATR_ENABLED)) {
if (test_bit(I40E_FLAG_FD_ATR_ENA, changed_flags) &&
!test_bit(I40E_FLAG_FD_ATR_ENA, new_flags)) {
set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
}
if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
if (test_bit(I40E_FLAG_TRUE_PROMISC_ENA, changed_flags)) {
u16 sw_flags = 0, valid_flags = 0;
int ret;
if (!(new_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
if (!test_bit(I40E_FLAG_TRUE_PROMISC_ENA, new_flags))
sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
@ -5387,17 +5394,17 @@ flags_complete:
}
}
if ((changed_flags & I40E_FLAG_RS_FEC) ||
(changed_flags & I40E_FLAG_BASE_R_FEC)) {
if (test_bit(I40E_FLAG_RS_FEC, changed_flags) ||
test_bit(I40E_FLAG_BASE_R_FEC, changed_flags)) {
u8 fec_cfg = 0;
if (new_flags & I40E_FLAG_RS_FEC &&
new_flags & I40E_FLAG_BASE_R_FEC) {
if (test_bit(I40E_FLAG_RS_FEC, new_flags) &&
test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) {
fec_cfg = I40E_AQ_SET_FEC_AUTO;
} else if (new_flags & I40E_FLAG_RS_FEC) {
} else if (test_bit(I40E_FLAG_RS_FEC, new_flags)) {
fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
I40E_AQ_SET_FEC_ABILITY_RS);
} else if (new_flags & I40E_FLAG_BASE_R_FEC) {
} else if (test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) {
fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
I40E_AQ_SET_FEC_ABILITY_KR);
}
@ -5405,35 +5412,35 @@ flags_complete:
dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
}
if ((changed_flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
(orig_flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)) {
if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) &&
test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, orig_flags)) {
dev_err(&pf->pdev->dev,
"Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
return -EOPNOTSUPP;
}
if ((changed_flags & I40E_FLAG_VF_VLAN_PRUNING) &&
if (test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, changed_flags) &&
pf->num_alloc_vfs) {
dev_warn(&pf->pdev->dev,
"Changing vf-vlan-pruning flag while VF(s) are active is not supported\n");
return -EOPNOTSUPP;
}
if ((changed_flags & I40E_FLAG_LEGACY_RX) &&
if (test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) &&
I40E_2K_TOO_SMALL_WITH_PADDING) {
dev_warn(&pf->pdev->dev,
"2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
return -EOPNOTSUPP;
}
if ((changed_flags & new_flags &
I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
(new_flags & I40E_FLAG_MFP_ENABLED))
if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) &&
test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, new_flags) &&
test_bit(I40E_FLAG_MFP_ENA, new_flags))
dev_warn(&pf->pdev->dev,
"Turning on link-down-on-close flag may affect other partitions\n");
if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
if (new_flags & I40E_FLAG_DISABLE_FW_LLDP) {
if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags)) {
if (test_bit(I40E_FLAG_FW_LLDP_DIS, new_flags)) {
#ifdef CONFIG_I40E_DCB
i40e_dcb_sw_default_config(pf);
#endif /* CONFIG_I40E_DCB */
@ -5474,7 +5481,7 @@ flags_complete:
* initialization or (b) while holding the RTNL lock, we don't need
* anything fancy here.
*/
pf->flags = new_flags;
bitmap_copy(pf->flags, new_flags, I40E_PF_FLAGS_NBITS);
/* Issue reset to cause things to take effect, as additional bits
* are added we will need to create a mask of bits requiring reset

587
drivers/net/ethernet/intel/i40e/i40e_main.c
View File

File diff suppressed because it is too large Load Diff

26
drivers/net/ethernet/intel/i40e/i40e_ptp.c
View File

@ -680,7 +680,7 @@ void i40e_ptp_rx_hang(struct i40e_pf *pf)
* configured. We don't want to spuriously warn about Rx timestamp
* hangs if we don't care about the timestamps.
*/
if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_rx)
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx)
return;
spin_lock_bh(&pf->ptp_rx_lock);
@ -733,7 +733,7 @@ void i40e_ptp_tx_hang(struct i40e_pf *pf)
{
struct sk_buff *skb;
if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_tx)
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx)
return;
/* Nothing to do if we're not already waiting for a timestamp */
@ -771,7 +771,7 @@ void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf)
u32 hi, lo;
u64 ns;
if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_tx)
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_tx)
return;
/* don't attempt to timestamp if we don't have an skb */
@ -818,7 +818,7 @@ void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index)
/* Since we cannot turn off the Rx timestamp logic if the device is
* doing Tx timestamping, check if Rx timestamping is configured.
*/
if (!(pf->flags & I40E_FLAG_PTP) || !pf->ptp_rx)
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags) || !pf->ptp_rx)
return;
hw = &pf->hw;
@ -924,7 +924,7 @@ int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr)
{
struct hwtstamp_config *config = &pf->tstamp_config;
if (!(pf->flags & I40E_FLAG_PTP))
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
return -EOPNOTSUPP;
return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
@ -1211,7 +1211,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
if (!(pf->hw_features & I40E_HW_PTP_L4_CAPABLE))
if (!test_bit(I40E_HW_PTP_L4_CAPABLE, pf->hw_features))
return -ERANGE;
pf->ptp_rx = true;
tsyntype = I40E_PRTTSYN_CTL1_V1MESSTYPE0_MASK |
@ -1225,7 +1225,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
if (!(pf->hw_features & I40E_HW_PTP_L4_CAPABLE))
if (!test_bit(I40E_HW_PTP_L4_CAPABLE, pf->hw_features))
return -ERANGE;
fallthrough;
case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
@ -1234,7 +1234,7 @@ static int i40e_ptp_set_timestamp_mode(struct i40e_pf *pf,
pf->ptp_rx = true;
tsyntype = I40E_PRTTSYN_CTL1_V2MESSTYPE0_MASK |
I40E_PRTTSYN_CTL1_TSYNTYPE_V2;
if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE) {
if (test_bit(I40E_HW_PTP_L4_CAPABLE, pf->hw_features)) {
tsyntype |= I40E_PRTTSYN_CTL1_UDP_ENA_MASK;
config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
} else {
@ -1308,7 +1308,7 @@ int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr)
struct hwtstamp_config config;
int err;
if (!(pf->flags & I40E_FLAG_PTP))
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
return -EOPNOTSUPP;
if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
@ -1426,7 +1426,7 @@ static long i40e_ptp_create_clock(struct i40e_pf *pf)
void i40e_ptp_save_hw_time(struct i40e_pf *pf)
{
/* don't try to access the PTP clock if it's not enabled */
if (!(pf->flags & I40E_FLAG_PTP))
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
return;
i40e_ptp_gettimex(&pf->ptp_caps, &pf->ptp_prev_hw_time, NULL);
@ -1483,7 +1483,7 @@ void i40e_ptp_init(struct i40e_pf *pf)
pf_id = (rd32(hw, I40E_PRTTSYN_CTL0) & I40E_PRTTSYN_CTL0_PF_ID_MASK) >>
I40E_PRTTSYN_CTL0_PF_ID_SHIFT;
if (hw->pf_id != pf_id) {
pf->flags &= ~I40E_FLAG_PTP;
clear_bit(I40E_FLAG_PTP_ENA, pf->flags);
dev_info(&pf->pdev->dev, "%s: PTP not supported on %s\n",
__func__,
netdev->name);
@ -1504,7 +1504,7 @@ void i40e_ptp_init(struct i40e_pf *pf)
if (pf->hw.debug_mask & I40E_DEBUG_LAN)
dev_info(&pf->pdev->dev, "PHC enabled\n");
pf->flags |= I40E_FLAG_PTP;
set_bit(I40E_FLAG_PTP_ENA, pf->flags);
/* Ensure the clocks are running. */
regval = rd32(hw, I40E_PRTTSYN_CTL0);
@ -1539,7 +1539,7 @@ void i40e_ptp_stop(struct i40e_pf *pf)
struct i40e_hw *hw = &pf->hw;
u32 regval;
pf->flags &= ~I40E_FLAG_PTP;
clear_bit(I40E_FLAG_PTP_ENA, pf->flags);
pf->ptp_tx = false;
pf->ptp_rx = false;

20
drivers/net/ethernet/intel/i40e/i40e_txrx.c
View File

@ -464,7 +464,7 @@ static int i40e_add_del_fdir_tcp(struct i40e_vsi *vsi,
&pf->fd_tcp6_filter_cnt);
if (add) {
if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
if (test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags) &&
I40E_DEBUG_FD & pf->hw.debug_mask)
dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 flow being applied\n");
set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
@ -734,7 +734,7 @@ static void i40e_fd_handle_status(struct i40e_ring *rx_ring, u64 qword0_raw,
* FD ATR/SB and then re-enable it when there is room.
*/
if (fcnt_prog >= (fcnt_avail - I40E_FDIR_BUFFER_FULL_MARGIN)) {
if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
if (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) &&
!test_and_set_bit(__I40E_FD_SB_AUTO_DISABLED,
pf->state))
if (I40E_DEBUG_FD & pf->hw.debug_mask)
@ -1071,7 +1071,7 @@ static void i40e_enable_wb_on_itr(struct i40e_vsi *vsi,
if (q_vector->arm_wb_state)
return;
if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
if (test_bit(I40E_FLAG_MSIX_ENA, vsi->back->flags)) {
val = I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK |
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK; /* set noitr */
@ -1095,7 +1095,7 @@ static void i40e_enable_wb_on_itr(struct i40e_vsi *vsi,
**/
void i40e_force_wb(struct i40e_vsi *vsi, struct i40e_q_vector *q_vector)
{
if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
if (test_bit(I40E_FLAG_MSIX_ENA, vsi->back->flags)) {
u32 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
I40E_PFINT_DYN_CTLN_ITR_INDX_MASK | /* set noitr */
I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
@ -2699,7 +2699,7 @@ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
u32 intval;
/* If we don't have MSIX, then we only need to re-enable icr0 */
if (!(vsi->back->flags & I40E_FLAG_MSIX_ENABLED)) {
if (!test_bit(I40E_FLAG_MSIX_ENA, vsi->back->flags)) {
i40e_irq_dynamic_enable_icr0(vsi->back);
return;
}
@ -2888,7 +2888,7 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb,
u16 i;
/* make sure ATR is enabled */
if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED))
if (!test_bit(I40E_FLAG_FD_ATR_ENA, pf->flags))
return;
if (test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
@ -2933,7 +2933,7 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb,
/* Due to lack of space, no more new filters can be programmed */
if (th->syn && test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
return;
if (pf->flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) {
if (test_bit(I40E_FLAG_HW_ATR_EVICT_ENA, pf->flags)) {
/* HW ATR eviction will take care of removing filters on FIN
* and RST packets.
*/
@ -2995,7 +2995,7 @@ static void i40e_atr(struct i40e_ring *tx_ring, struct sk_buff *skb,
I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) &
I40E_TXD_FLTR_QW1_CNTINDEX_MASK;
if (pf->flags & I40E_FLAG_HW_ATR_EVICT_ENABLED)
if (test_bit(I40E_FLAG_HW_ATR_EVICT_ENA, pf->flags))
dtype_cmd |= I40E_TXD_FLTR_QW1_ATR_MASK;
fdir_desc->qindex_flex_ptype_vsi = cpu_to_le32(flex_ptype);
@ -3053,7 +3053,7 @@ static inline int i40e_tx_prepare_vlan_flags(struct sk_buff *skb,
tx_flags |= I40E_TX_FLAGS_SW_VLAN;
}
if (!(tx_ring->vsi->back->flags & I40E_FLAG_DCB_ENABLED))
if (!test_bit(I40E_FLAG_DCB_ENA, tx_ring->vsi->back->flags))
goto out;
/* Insert 802.1p priority into VLAN header */
@ -3229,7 +3229,7 @@ static int i40e_tsyn(struct i40e_ring *tx_ring, struct sk_buff *skb,
* we are not already transmitting a packet to be timestamped
*/
pf = i40e_netdev_to_pf(tx_ring->netdev);
if (!(pf->flags & I40E_FLAG_PTP))
if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
return 0;
if (pf->ptp_tx &&

4
drivers/net/ethernet/intel/i40e/i40e_txrx.h
View File

@ -92,8 +92,8 @@ enum i40e_dyn_idx {
BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))
#define i40e_pf_get_default_rss_hena(pf) \
(((pf)->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) ? \
I40E_DEFAULT_RSS_HENA_EXPANDED : I40E_DEFAULT_RSS_HENA)
(test_bit(I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE, (pf)->hw_features) ? \
I40E_DEFAULT_RSS_HENA_EXPANDED : I40E_DEFAULT_RSS_HENA)
/* Supported Rx Buffer Sizes (a multiple of 128) */
#define I40E_RXBUFFER_256 256

20
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
View File

@ -1808,7 +1808,7 @@ int i40e_alloc_vfs(struct i40e_pf *pf, u16 num_alloc_vfs)
if (pci_num_vf(pf->pdev) != num_alloc_vfs) {
ret = pci_enable_sriov(pf->pdev, num_alloc_vfs);
if (ret) {
pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
clear_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
pf->num_alloc_vfs = 0;
goto err_iov;
}
@ -1919,8 +1919,8 @@ int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
}
if (num_vfs) {
if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
if (!test_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags)) {
set_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
i40e_do_reset_safe(pf, I40E_PF_RESET_AND_REBUILD_FLAG);
}
ret = i40e_pci_sriov_enable(pdev, num_vfs);
@ -1929,7 +1929,7 @@ int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs)
if (!pci_vfs_assigned(pf->pdev)) {
i40e_free_vfs(pf);
pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
clear_bit(I40E_FLAG_VEB_MODE_ENA, pf->flags);
i40e_do_reset_safe(pf, I40E_PF_RESET_AND_REBUILD_FLAG);
} else {
dev_warn(&pdev->dev, "Unable to free VFs because some are assigned to VMs.\n");
@ -2137,14 +2137,14 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PF) {
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_PF;
} else {
if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
if (test_bit(I40E_HW_RSS_AQ_CAPABLE, pf->hw_features) &&
(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_AQ))
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_AQ;
else
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RSS_REG;
}
if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE) {
if (test_bit(I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE, pf->hw_features)) {
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2)
vfres->vf_cap_flags |=
VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2;
@ -2153,12 +2153,12 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP;
if ((pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE) &&
if (test_bit(I40E_HW_OUTER_UDP_CSUM_CAPABLE, pf->hw_features) &&
(vf->driver_caps & VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM))
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM;
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_RX_POLLING) {
if (pf->flags & I40E_FLAG_MFP_ENABLED) {
if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
dev_err(&pf->pdev->dev,
"VF %d requested polling mode: this feature is supported only when the device is running in single function per port (SFP) mode\n",
vf->vf_id);
@ -2168,7 +2168,7 @@ static int i40e_vc_get_vf_resources_msg(struct i40e_vf *vf, u8 *msg)
vfres->vf_cap_flags |= VIRTCHNL_VF_OFFLOAD_RX_POLLING;
}
if (pf->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) {
if (test_bit(I40E_HW_WB_ON_ITR_CAPABLE, pf->hw_features)) {
if (vf->driver_caps & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR)
vfres->vf_cap_flags |=
VIRTCHNL_VF_OFFLOAD_WB_ON_ITR;
@ -4841,7 +4841,7 @@ int i40e_ndo_set_vf_trust(struct net_device *netdev, int vf_id, bool setting)
goto out;
}
if (pf->flags & I40E_FLAG_MFP_ENABLED) {
if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
dev_err(&pf->pdev->dev, "Trusted VF not supported in MFP mode.\n");
ret = -EINVAL;
goto out;