drm/amd/pm: Ignore initial value in smu response register
Why: If the reg mmMP1_SMN_C2PMSG_90 is being written to during amdgpu driver load or driver unload, subsequent amdgpu driver load will fail at smu_hw_init. The default of mmMP1_SMN_C2PMSG_90 register at a clean environment is 0x1 and if value differs from expected, amdgpu driver load will fail. How to fix: Ignore the initial value in smu response register before the first smu message is sent,if smc in SMU_FW_INIT state, just proceed further to send the message. If register holds an unexpected value after smu message was sent set, smc_state to SMU_FW_HANG state and no further smu messages will be sent. v2: Set SMU_FW_INIT state at the start of smu hw_init/resume. Check smc_fw_state before sending smu message if in hang state skip sending message. Set SMU_FW_HANG only in case unexpected value is detected Signed-off-by: Danijel Slivka <danijel.slivka@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1755,6 +1755,8 @@ static int smu_start_smc_engine(struct smu_context *smu)
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struct amdgpu_device *adev = smu->adev;
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int ret = 0;
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smu->smc_fw_state = SMU_FW_INIT;
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if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
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if (amdgpu_ip_version(adev, MP1_HWIP, 0) < IP_VERSION(11, 0, 0)) {
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if (smu->ppt_funcs->load_microcode) {
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@ -495,6 +495,12 @@ struct stb_context {
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spinlock_t lock;
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};
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enum smu_fw_status {
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SMU_FW_INIT = 0,
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SMU_FW_RUNTIME,
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SMU_FW_HANG,
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};
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#define WORKLOAD_POLICY_MAX 7
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/*
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@ -562,6 +568,7 @@ struct smu_context {
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uint32_t smc_fw_if_version;
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uint32_t smc_fw_version;
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uint32_t smc_fw_caps;
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uint8_t smc_fw_state;
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bool uploading_custom_pp_table;
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bool dc_controlled_by_gpio;
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@ -315,11 +315,21 @@ int smu_cmn_send_msg_without_waiting(struct smu_context *smu,
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if (adev->no_hw_access)
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return 0;
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reg = __smu_cmn_poll_stat(smu);
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res = __smu_cmn_reg2errno(smu, reg);
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if (reg == SMU_RESP_NONE ||
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res == -EREMOTEIO)
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if (smu->smc_fw_state == SMU_FW_HANG) {
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dev_err(adev->dev, "SMU is in hanged state, failed to send smu message!\n");
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res = -EREMOTEIO;
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goto Out;
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}
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if (smu->smc_fw_state == SMU_FW_INIT) {
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smu->smc_fw_state = SMU_FW_RUNTIME;
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} else {
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reg = __smu_cmn_poll_stat(smu);
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res = __smu_cmn_reg2errno(smu, reg);
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if (reg == SMU_RESP_NONE || res == -EREMOTEIO)
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goto Out;
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}
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__smu_cmn_send_msg(smu, msg_index, param);
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res = 0;
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Out:
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@ -350,6 +360,9 @@ int smu_cmn_wait_for_response(struct smu_context *smu)
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reg = __smu_cmn_poll_stat(smu);
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res = __smu_cmn_reg2errno(smu, reg);
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if (res == -EREMOTEIO)
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smu->smc_fw_state = SMU_FW_HANG;
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if (unlikely(smu->adev->pm.smu_debug_mask & SMU_DEBUG_HALT_ON_ERROR) &&
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res && (res != -ETIME)) {
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amdgpu_device_halt(smu->adev);
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@ -418,6 +431,16 @@ int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
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goto Out;
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}
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if (smu->smc_fw_state == SMU_FW_HANG) {
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dev_err(adev->dev, "SMU is in hanged state, failed to send smu message!\n");
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res = -EREMOTEIO;
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goto Out;
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} else if (smu->smc_fw_state == SMU_FW_INIT) {
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/* Ignore initial smu response register value */
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poll = false;
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smu->smc_fw_state = SMU_FW_RUNTIME;
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}
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if (poll) {
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reg = __smu_cmn_poll_stat(smu);
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res = __smu_cmn_reg2errno(smu, reg);
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@ -429,8 +452,11 @@ int smu_cmn_send_smc_msg_with_param(struct smu_context *smu,
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__smu_cmn_send_msg(smu, (uint16_t) index, param);
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reg = __smu_cmn_poll_stat(smu);
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res = __smu_cmn_reg2errno(smu, reg);
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if (res != 0)
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if (res != 0) {
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if (res == -EREMOTEIO)
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smu->smc_fw_state = SMU_FW_HANG;
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__smu_cmn_reg_print_error(smu, reg, index, param, msg);
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}
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if (read_arg) {
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smu_cmn_read_arg(smu, read_arg);
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dev_dbg(adev->dev, "smu send message: %s(%d) param: 0x%08x, resp: 0x%08x,\
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